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System-on-chip

  • P90CL301 IIC驅(qū)動電路的例行測試及其程序

    The P90CL301 is a highly integrated 16/32 bit micro-controller especially suitable for applications requiring lowvoltage and low power consumption. It is fully software compatible with the 68000. Furthermore, it provides bothstandard as well as advanced peripheral functions on-chip.One of these peripheral functions is the I2C bus. This report describes worked-out driver software (written in C) toprogram the P90CL301 I2C interface. It also contains interface software routines offering the user a quick start inwriting a complete I2C system application.

    標(biāo)簽: P90 301 IIC 90

    上傳時(shí)間: 2014-01-06

    上傳用戶:氣溫達(dá)上千萬的

  • XA-S3的IIC接口的驅(qū)動器軟件程序(C語言)

    The XA-S3 is a member of Philips Semiconductors’ XA (eXtended Architecture) family of high performance 16-bit single-chip Microcontrollers. The XA-S3 combines many powerful peripherals on one chip. Therefore, it is suited for general multipurpose high performance embedded control functions.One of the on-chip peripherals is the I2C bus interface. This report describes worked-out driver software (written in C) to program / use the I2C interface of the XA-S3. The driver software, together with a demo program and interface software routines offer the user a quick start in writing a complete I2C - XAS3 system application.

    標(biāo)簽: XA-S IIC C語言 接口

    上傳時(shí)間: 2013-11-10

    上傳用戶:liaofamous

  • at89c52 pdf

    The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s high-density nonvolatile memory technology and iscompatible with the industry-standard 80C51 and 80C52 instruction set and pinout.The on-chip Flash allows the program memory to be reprogrammed in-system or by aconventional nonvolatile memory programmer. By combining a versatile 8-bit CPUwith Flash on a monolithic chip, the Atmel AT89C52 is a powerful microcomputerwhich provides a highly-flexible and cost-effective solution to many embedded controlapplications.

    標(biāo)簽: 89c c52 at

    上傳時(shí)間: 2013-11-10

    上傳用戶:1427796291

  • 《器件封裝用戶向?qū)А焚愳`思產(chǎn)品封裝資料

    Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.

    標(biāo)簽: 封裝 器件 用戶 賽靈思

    上傳時(shí)間: 2013-10-22

    上傳用戶:ztj182002

  • C8051F020數(shù)據(jù)手冊

      The C8051F020/1/2/3 devices are fully integrated mixed-signal System-on-a-Chip MCUs with 64 digital I/O pins (C8051F020/2) or 32 digital I/O pins (C8051F021/3). Highlighted features are listed below; refer to Table 1.1 for specific product feature selection.

    標(biāo)簽: C8051F020 數(shù)據(jù)手冊

    上傳時(shí)間: 2013-11-08

    上傳用戶:lwq11

  • 接口選擇指南

    LVDS、xECL、CML(低電壓差分信號傳輸、發(fā)射級耦合邏輯、電流模式邏輯)………4多點(diǎn)式低電壓差分信號傳輸(M-LVDS) ……………………………………………………8數(shù)字隔離器 ………………………………………………………………………………10RS-485/422 …………………………………………………………………………………11RS-232………………………………………………………………………………………13UART(通用異步收發(fā)機(jī))…………………………………………………………………16CAN(控制器局域網(wǎng))……………………………………………………………………18FlatLinkTM 3G ………………………………………………………………………………19SerDes(串行G 比特收發(fā)機(jī)及LVDS)……………………………………………………20DVI(數(shù)字視頻接口)/PanelBusTM ………………………………………………………22TMDS(最小化傳輸差分信號) …………………………………………………………24USB 集線器控制器及外設(shè)器件 …………………………………………………………25USB 接口保護(hù) ……………………………………………………………………………26USB 電源管理 ……………………………………………………………………………27PCI Express® ………………………………………………………………………………29PCI 橋接器 …………………………………………………………………………………33卡總線 (CardBus) 電源開關(guān) ………………………………………………………………341394 (FireWire®, 火線®) ……………………………………………………………………36GTLP (Gunning Transceiver Logic Plus,體效應(yīng)收發(fā)機(jī)邏輯+) ………………………………39VME(Versa Module Eurocard)總線 ………………………………………………………41時(shí)鐘分配電路 ……………………………………………………………………………42交叉參考指南 ……………………………………………………………………………43器件索引 …………………………………………………………………………………47技術(shù)支持 …………………………………………………………………………………48 德州儀器(TI)為您提供了完備的接口解決方案,使得您的產(chǎn)品別具一格,并加速了產(chǎn)品面市。憑借著在高速、復(fù)合信號電路、系統(tǒng)級芯片 (system-on-a-chip ) 集成以及先進(jìn)的產(chǎn)品開發(fā)工藝方面的技術(shù)專長,我們將能為您提供硅芯片、支持工具、軟件和技術(shù)文檔,使您能夠按時(shí)的完成并將最佳的產(chǎn)品推向市場,同時(shí)占據(jù)一個(gè)具有競爭力的價(jià)格。本選擇指南為您提供與下列器件系列有關(guān)的設(shè)計(jì)考慮因素、技術(shù)概述、產(chǎn)品組合圖示、參數(shù)表以及資源信息:

    標(biāo)簽: 接口 選擇指南

    上傳時(shí)間: 2013-10-21

    上傳用戶:Jerry_Chow

  • 基于SOPC技術(shù)的異步串行通信IP核的設(shè)計(jì)

    介紹了SoPC(System on a Programmable Chip)系統(tǒng)的概念和特點(diǎn),給出了基于PLB總線的異步串行通信(UART)IP核的硬件設(shè)計(jì)和實(shí)現(xiàn)。通過將設(shè)計(jì)好的UART IP核集成到SoPC系統(tǒng)中加以驗(yàn)證,證明了所設(shè)計(jì)的UART IP核可以正常工作。該設(shè)計(jì)方案為其他基于SoPC系統(tǒng)IP核的開發(fā)提供了一定的參考。

    標(biāo)簽: SOPC IP核 異步串行通信

    上傳時(shí)間: 2013-11-12

    上傳用戶:894448095

  • LPC1850 Cortex-M3內(nèi)核微控制器數(shù)據(jù)手冊

    The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embeddedapplications. The ARM Cortex-M3 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC1850/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals. The ARMCortex-M3 CPU also includes an internal prefetch unit that supports speculativebranching.The LPC1850/30/20/10 include up to 200 kB of on-chip SRAM data memory, a quad SPIFlash Interface (SPIFI), a State Configuration Timer (SCT) subsystem, two High-speedUSB controllers, Ethernet, LCD, an external memory controller, and multiple digital andanalog peripherals.

    標(biāo)簽: Cortex-M 1850 LPC 內(nèi)核微控制器

    上傳時(shí)間: 2014-12-31

    上傳用戶:zhuoying119

  • LPC1300系列產(chǎn)品勘誤數(shù)據(jù)手冊

    On the LPC13xx, programming, erasure and re-programming of the on-chip flash can be performed using In-System Programming (ISP) via the UART serial port, and also, can be performed using In-Application Programming (IAP) calls directed by the end-user code. For In-System Programming (ISP) via the UART serial port, the ISP command handler (resides in the bootloader) allows erasure of one or more sector (s) of the on-chip flash memory.

    標(biāo)簽: 1300 LPC 勘誤 數(shù)據(jù)手冊

    上傳時(shí)間: 2013-12-13

    上傳用戶:lmq0059

  • 《器件封裝用戶向?qū)А焚愳`思產(chǎn)品封裝資料

    Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.

    標(biāo)簽: 封裝 器件 用戶 賽靈思

    上傳時(shí)間: 2013-11-21

    上傳用戶:不懂夜的黑

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