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System-on-a-<b>CHip</b>

  • 傳感器信號(hào)調(diào)節(jié) - 用于信號(hào)調(diào)節(jié)的ADC

    The trend in ADCs and DACs is toward higher speeds and higher resolutions atreduced power levels. Modern data converters generally operate on ±5V (dualsupply) or +5V (single supply). In fact, many new converters operate on a single +3Vsupply. This trend has created a number of design and applications problems whichwere much less important in earlier data converters, where ±15V supplies and ±10Vinput ranges were the standard.

    標(biāo)簽: ADC 信號(hào)調(diào)節(jié) 傳感器

    上傳時(shí)間: 2013-11-16

    上傳用戶(hù):sjw920325

  • 諧振器論文精選.rar

    Control systems are becoming increasingly dependent on digital processing and so require sensors able to provide direct digital inputs. Sensors based on time measurement, having outputs based on a frequency or phase, have an advantage over conventional analogue sensors in that their outputs can be measured directly in digital systems by pulse counting.

    標(biāo)簽: 諧振器 論文

    上傳時(shí)間: 2013-10-08

    上傳用戶(hù):wuyuying

  • 相敏檢波電路鑒相特性的仿真研究

    分析了調(diào)幅信號(hào)和載波信號(hào)之間的相位差與調(diào)制信號(hào)的極性的對(duì)應(yīng)關(guān)系,得出了相敏檢波電路輸出電壓的極性與調(diào)制信號(hào)的極性有對(duì)應(yīng)關(guān)系的結(jié)論。為了驗(yàn)證相敏檢波電路的這一特性,給出3 個(gè)電路方案,分別選用理想元件和實(shí)際元件,采用Multisim 對(duì)其進(jìn)行仿真實(shí)驗(yàn),直觀形象地演示了相敏檢波電路的鑒相特性,是傳統(tǒng)的實(shí)際操作實(shí)驗(yàn)所不可比擬的。關(guān)鍵詞:相敏檢波;鑒相特性;Multisim;電路仿真 Abstract : The corresponding relation between modulation signal polarity and difference phases of amplitudemodulated signal and the carrier signal ,the polarity of phase2sensitive detecting circuit output voltage and the polarity of modulation signal are correspondent . In order to verify this characteristic ,three elect ric circuit s plans are produced ,idea element s and actual element s are selected respectively. Using Multisim to carry on a simulation experiment ,and then demonst rating the phase detecting characteristic of the phase sensitive circuit vividly and directly. Which is t raditional practical experience cannot be com pared.Keywords :phase sensitive detection ;phase2detecting characteristic ;Multisim;circuit simulation

    標(biāo)簽: 相敏檢波 電路 仿真研究 鑒相

    上傳時(shí)間: 2013-11-23

    上傳用戶(hù):guanhuihong

  • 光電轉(zhuǎn)換電路設(shè)計(jì)

    OPTOELECTRONICS CIRCUIT COLLECTION AVALANCHE PHOTODIODE BIAS SUPPLY 1Provides an output voltage of 0V to +80V for reverse biasingan avalanche photodiode to control its gain. This circuit canalso be reconfigured to supply a 0V to –80V output.LINEAR TEC DRIVER–1This is a bridge-tied load (BTL) linear amplifier for drivinga thermoelectric cooler (TEC). It operates on a single +5Vsupply and can drive ±2A into a common TEC.LINEAR TEC DRIVER–2This is very similar to DRIVER–1 but its power output stagewas modified to operate from a single +3.3V supply in orderto increase its efficiency. Driving this amplifier from astandard +2.5V referenced signal causes the output transistorsto have unequal power dissipation.LINEAR TEC DRIVER–3This BTL TEC driver power output stage achieves very highefficiency by swinging very close to its supply rails, ±2.5V.This driver can also drive ±2A into a common TEC. Operationis shown with the power output stage operating on±1.5V supplies. Under these conditions, this linear amplifiercan achieve very high efficiency. Application ReportThe following collection of analog circuits may be useful in electro-optics applications such as optical networkingsystems. This page summarizes their salient characteristics.

    標(biāo)簽: 光電轉(zhuǎn)換 電路設(shè)計(jì)

    上傳時(shí)間: 2013-10-27

    上傳用戶(hù):落花無(wú)痕

  • 高功率PoE PD接口與集成反激式控制器

      To this day, Power over Ethernet (PoE) continues to gainpopularity in today’s networking world. The 12.95Wdelivered to the Powered Device (PD) input supplied bythe Power Sourcing Equipment (PSE) is a universal supply.Each PD provides its own DC/DC conversion from anominal 48V supply, thus eliminating the need for a correctvoltage wall adapter. However, higher power devicescan not take advantage of standard PoE because of itspower limitations, and must rely on a large wall adapteras their primary supply. The new LTC4268-1 breaks thispower barrier by allowing for power of up to 35W for suchpower-hungry 2-pair PoE applications. The LTC4268-1provides a complete solution by integrating a high powerPD interface control with an isolated fl yback controller.

    標(biāo)簽: PoE 高功率 PD接口 集成

    上傳時(shí)間: 2014-12-24

    上傳用戶(hù):jasson5678

  • 跟蹤和排序功能的緊湊型雙通道降壓轉(zhuǎn)換器

      Typical industrial and automotive applications requiremultiple high current, low voltage power supply solutionsto drive everything from disc drives to microprocessors.For many of these applications, particularly thosethat have size constraints, the LT3501® dual step-downconverter is an attractive solution because it’s compactand inexpensive compared to a 2-chip solution. The dualconverter accommodates a 3V to 25V input voltage rangeand is capable of supplying up to 3A per channel. Thecircuit in Figure 1 produces 3.3V and 1.8V.

    標(biāo)簽: 排序 雙通道 降壓轉(zhuǎn)換器

    上傳時(shí)間: 2014-12-24

    上傳用戶(hù):372825274

  • 運(yùn)用LT3092電流源以高線性度來(lái)實(shí)現(xiàn)溫度至電流轉(zhuǎn)換

      One of the fi rst lessons in a basic electronics coursecovers the symbols for resistors, capacitors, inductors,voltage sources and current sources. Althougheach symbol represents a functional component of areal-world circuit, only some of the symbols have directphysical counterparts. For instance, the three discretepassive devices—resistors, capacitors, inductors—canbe picked off a shelf and placed on a real board muchas their symbolic analogs appear in a basic schematic.Likewise, while voltage sources have no direct 2-terminalanalog, a voltage source can be easily built with an offthe-shelf linear regulator.

    標(biāo)簽: 3092 LT 電流源 溫度

    上傳時(shí)間: 2013-11-24

    上傳用戶(hù):simonpeng

  • 80C51特殊功能寄存器地址表

    /*--------- 8051內(nèi)核特殊功能寄存器 -------------*/ sfr ACC = 0xE0;             //累加器 sfr B = 0xF0;  //B 寄存器 sfr PSW    = 0xD0;           //程序狀態(tài)字寄存器 sbit CY    = PSW^7;       //進(jìn)位標(biāo)志位 sbit AC    = PSW^6;        //輔助進(jìn)位標(biāo)志位 sbit F0    = PSW^5;        //用戶(hù)標(biāo)志位0 sbit RS1   = PSW^4;        //工作寄存器組選擇控制位 sbit RS0   = PSW^3;        //工作寄存器組選擇控制位 sbit OV    = PSW^2;        //溢出標(biāo)志位 sbit F1    = PSW^1;        //用戶(hù)標(biāo)志位1 sbit P     = PSW^0;        //奇偶標(biāo)志位 sfr SP    = 0x81;            //堆棧指針寄存器 sfr DPL  = 0x82;            //數(shù)據(jù)指針0低字節(jié) sfr DPH  = 0x83;            //數(shù)據(jù)指針0高字節(jié) /*------------ 系統(tǒng)管理特殊功能寄存器 -------------*/ sfr PCON  = 0x87;           //電源控制寄存器 sfr AUXR = 0x8E;              //輔助寄存器 sfr AUXR1 = 0xA2;             //輔助寄存器1 sfr WAKE_CLKO = 0x8F;        //時(shí)鐘輸出和喚醒控制寄存器 sfr CLK_DIV  = 0x97;          //時(shí)鐘分頻控制寄存器 sfr BUS_SPEED = 0xA1;        //總線速度控制寄存器 /*----------- 中斷控制特殊功能寄存器 --------------*/ sfr IE     = 0xA8;           //中斷允許寄存器 sbit EA    = IE^7;  //總中斷允許位  sbit ELVD  = IE^6;           //低電壓檢測(cè)中斷控制位 8051

    標(biāo)簽: 80C51 特殊功能寄存器 地址

    上傳時(shí)間: 2013-10-30

    上傳用戶(hù):yxgi5

  • FET430PIF自制資料

    The MSP-FET430PIF is a Parallel Port interface (does not include target board) that is used to program and debug MSP430 FET tools and test boards through the JTAG interface. This interface is included in our FET tools, but sold without the development board. This interface uses a Parallel PC Port to communicate to the Debugger Software (IAR Kickstart software included) running on the PC. The interface uses the standard 14 pin header to communicate to the MSP430 device using the standard JTAG protocol. The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is extremely low power, no external power supply is required. The tool has an integrated software environment and connects directly to the PC which greatly simplifies the set-up and use of the tool. The flash development tool supports development with all MSP430 flash parts. Features MSP430 debugging interface to connect a MSP430-Flash-device to a Parallel port on a PC Supports JTAG debug protocol (NO support for Spy-Bi-Wire (2-wire JTAG) debug protocol, Spy-Bi-Wire (2-wire JTAG) is supported by MSP-FET430UIF) Parallel Port cable and a 14-conductor target cable Full documentation on CD ROM Integrated IAR Kickstart user interface which includes: Assembler Linker Limulator Source-level debugger Limited C-compiler Technical specifications: Backwardly compatable with existing FET tool boards.

    標(biāo)簽: FET 430 PIF

    上傳時(shí)間: 2013-10-26

    上傳用戶(hù):fengweihao158@163.com

  • 可編程系統(tǒng)級(jí)芯片提供了最大設(shè)計(jì)的靈活性

    可編程系統(tǒng)級(jí)芯片提供了最大設(shè)計(jì)的靈活性 極端靈活且完全可編程的混合信號(hào)SOC 的基本原理是促使賽普拉斯微系統(tǒng)公司(Cypress MicroSystems)推出名為PSoCTM(Programmable System-On-ChipTM,可編程系統(tǒng)級(jí)芯片)的全新一代器件的動(dòng)力所在。

    標(biāo)簽: 可編程 系統(tǒng)級(jí)芯片

    上傳時(shí)間: 2013-10-22

    上傳用戶(hù):playboys0

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