對fpga時序和亞穩態比較詳盡的介紹
上傳時間： 2013-10-16
上傳用戶：truth12
為了實現低成本的MEMS慣性測量組合應用于現有應用系統或測試系統，提出了一種基于FPGA的MIMU信號處理技術方案，并完成系統的軟硬件設計。該系統實現了采集現有MIMU輸出的RS422數字信號，將其轉換為目前激光或光纖陀螺的脈沖調制頻率信號，使之能夠應用于現有應用系統或測試系統。實際應用表面，該系統能夠實現預期功能，達到了設計要求。
上傳時間： 2013-10-13
上傳用戶：yulg
Microsemi的IGLOO®FPGA中，針對成本優化的FPGA市場，第四代基于閃存的FPGA架構和高性能通信接口集成在單一芯片上。
上傳時間： 2013-10-17
上傳用戶：rnsfing
FPGA與ARM EPI通信，控制16路步進電機和12路DC馬達 VHDL編寫的，，，，，
上傳時間： 2013-10-21
上傳用戶：zhyfjj
FPGA設計的四種常用思想與技巧
標簽： FPGA
上傳時間： 2014-12-28
上傳用戶：aa7821634
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽： UltraScale Xilinx 架構
上傳時間： 2013-11-13
上傳用戶：瓦力瓦力hong
spartan-3e-FPGA開發板
上傳時間： 2013-12-12
上傳用戶：zgu489
5款ALTERA FPGA開發板原理圖合集
上傳時間： 2013-10-22
上傳用戶：幾何公差
文中提出了一種基于FPGA的八通道超聲探傷系統設計方案。該系統利用低功耗可變增益運放和八通道ADC構成高集成度的前端放大和數據采集模塊；采用FPGA和ARM作為數字信號處理的核心和人機交互的通道。為了滿足探傷系統實時、高速的要求，我們采用了硬件報警，缺陷回波峰值包絡存儲等關鍵技術。此外，該系統在小型化和數字化方面有顯著提高，為便攜式多通道超聲檢測系統設計奠定基礎
上傳時間： 2013-11-07
上傳用戶：xaijhqx
SF-CY3 FPGA套件開發指南Ver6.00 （by特權同學）
上傳時間： 2013-10-22
上傳用戶：songnanhua
