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Sets

  • This toolbox implements the same methods on small dadta Sets and imlements a trimming method using a

    This toolbox implements the same methods on small dadta Sets and imlements a trimming method using a random uniform distribution to quickly process large data Sets.

    標簽: implements imlements trimming toolbox

    上傳時間: 2017-07-28

    上傳用戶:helmos

  • Mastering the Requirements Process, Second Edition, Sets out an industry-proven process for gatherin

    Mastering the Requirements Process, Second Edition, Sets out an industry-proven process for gathering and verifying requirements with an eye toward today s agile development environments. In this total update of the bestselling guide, the authors show how to discover precisely what the customer wants and needs while doing the minimum requirements work according to the project s level of agility.

    標簽: industry-proven Requirements Mastering gatherin

    上傳時間: 2013-12-08

    上傳用戶:璇珠官人

  • MPC89X58a IS A SINGLE-CHIP 8-BIT MICROCONTROLLER WITH THE INSTARUCTION Sets FULLY

    MPC89X58a IS A SINGLE-CHIP 8-BIT MICROCONTROLLER WITH THE INSTARUCTION Sets FULLY

    標簽: MICROCONTROLLER INSTARUCTION SINGLE-CHIP FULLY

    上傳時間: 2017-08-14

    上傳用戶:watch100

  • Fuzzy logic example that sorts temperatures into fuzzy Sets.

    Fuzzy logic example that sorts temperatures into fuzzy Sets.

    標簽: temperatures example Fuzzy logic

    上傳時間: 2017-08-24

    上傳用戶:sxdtlqqjl

  • Radar Sets. Description about Radars.

    Radar Sets. Description about Radars.

    標簽: Description Radars Radar about

    上傳時間: 2017-09-08

    上傳用戶:ma1301115706

  • Allegro SPB V15.2 版新增功能

    15.2 已經加入了有關貫孔及銲點的Z軸延遲計算功能. 先開啟 Setup - Constraints - Electrical constraint Sets  下的 DRC 選項.  點選 Electrical Constraints dialog box 下 Options 頁面 勾選 Z-Axis delay欄. 

    標簽: Allegro 15.2 SPB

    上傳時間: 2013-10-08

    上傳用戶:王慶才

  • 電臺維修模擬訓練系統設計方法研究

    Methods for designing a maintenance simulation training system for certain kind of radio are introduced. Fault modeling method is used to establish the fault database. The system Sets up some typical failures, follow the prompts trainers can locate the fault source and confirm the type to accomplish corresponding fault maintenance training. A training evaluation means is given to examining and evaluating the training performance. The system intuitively and vividly shows the fault maintenance process, it can not only be used in teaching, but also in daily maintenance training to efficiently improve the maintenance operation level. Graphical programming language LabVIEW is used to develop the system platform.

    標簽: 電臺維修 模擬訓練 方法研究 系統設計

    上傳時間: 2013-11-19

    上傳用戶:3294322651

  • MAX14885E VGA交叉開關電源排序

      The MAX14885E, a 2:2 VGA switch, connects a VGA source to a VGA monitor. To ease direct connection to graphics controllers orthe ASIC, the MAX14885E has two supplies: VCC, a 5V ±5% supply, drives the VGA side interface; and the VL supply Sets the logicswitching thresholds on the digital input pins (EN, S00, S01, S10, S11, SHA, SHB, SVA, and SVB). This application note documentsthe proper sequencing of the VCC and VL power supplies on power-up.

    標簽: 14885E 14885 MAX VGA

    上傳時間: 2013-10-23

    上傳用戶:wuchunzhong

  • DN460雙輸出降壓穩壓器優化效率

      The LTC3546 is a dual output current mode buck regulatorwith fl exible output current partitioning. Beyondthe advantages normally associated with dual outputregulators (reduced size, cost, EMI and part count, withimproved effi ciency), the LTC3546’s outputs can bepartitioned for either 3A and 1A outputs, or two 2A outputs.This increases its application range and simplifi esmultiple supply rail designs. A confi gurable Burst Mode®clamp for each output Sets the current transition levelbetween Burst Mode operation and forced continuousconduction mode to optimize effi ciency over the entireoutput range. An adjustable switching frequency up to4MHz and internal power MOSFET switches allow forsmall and compact footprints.

    標簽: 460 DN 輸出 優化效率

    上傳時間: 2013-11-04

    上傳用戶:yxgi5

  • lpc2478完全使用手冊

    NXP Semiconductor designed the LPC2400 microcontrollers around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speedFlash memory. This Flash memory includes a special 128-bit wide memory interface andaccelerator architecture that enables the CPU to execute sequential instructions fromFlash memory at the maximum 72 MHz system clock rate. This feature is available onlyon the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both32-bit ARM and 16-bit Thumb instructions. Support for the two Instruction Sets meansEngineers can choose to optimize their application for either performance or code size atthe sub-routine level. When the core executes instructions in Thumb state it can reducecode size by more than 30 % with only a small loss in performance while executinginstructions in ARM state maximizes core performance.

    標簽: 2478 lpc 使用手冊

    上傳時間: 2013-11-15

    上傳用戶:zouxinwang

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