大量篇幅介紹VxD 程式設(shè)計的技術(shù)與實作細(xì)節(jié)（包括 Plug & Play device, Communication Driver, Serial Port, VCOMM, IOS, IFS... ）。其內(nèi)容之詳盡豐富，技術(shù)之深刻紮 實，實在是這個領(lǐng)域的罕見好書
標(biāo)簽： Communication Driver Serial device
上傳時間： 2016-12-31
上傳用戶：tzl1975
it a channel for the wii. We can play game backup with softchip.dol and we can use this channel to load the latest version of softchip
標(biāo)簽： channel can softchip backup
上傳時間： 2017-03-01
上傳用戶：asdfasdfd
This file is a function under matlab which allow to read, play and plot audio signals from wav file. We can also extract the sampling frequency and coding bit number
標(biāo)簽： file function signals matlab
上傳時間： 2014-01-25
上傳用戶：diets
AOE tutorial, basicly about this games and how to play
標(biāo)簽： tutorial basicly about games
上傳時間： 2013-12-11
上傳用戶：comua
Play Fair in java encrption and decryption file
標(biāo)簽： decryption encrption Play Fair
上傳時間： 2013-12-25
上傳用戶：米卡
this is chess game play and enjoy
標(biāo)簽： chess enjoy this game
上傳時間： 2017-09-01
上傳用戶：watch100
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around the common on-chip bus, and use a coherent method for simulation and synthesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plug&play method is used to configure and connect the IP cores without the need to modify any global resources.
標(biāo)簽： system-on-chip integrated designed reusable
上傳時間： 2013-12-20
上傳用戶：小眼睛LSL
PCI Hot-Plug Specification Revision 1.0 The primary objective of this specification is to enable higher availability of file and application servers by standardizing key aspects of the process of removing and installing PCI adapter cards while the system is running. Although these same principles can be applied to desktop and portable systems using PCI buses, the operations described here target server platforms.
標(biāo)簽： Specification specification objective Hot-Plug
上傳時間： 2013-12-09
上傳用戶：zyt
In the process of copper flash smelting, lining temperature of reaction shaft and its inner wall sluggish play a very important role in lining life. Up to now, however
標(biāo)簽： temperature smelting reaction process
上傳時間： 2015-10-03
上傳用戶：wang5829
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around a common on-chip bus, and use a coherent method for simulation and synthesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plug&play method is used to configure and connect the IP cores without the need to modify any global resources.
標(biāo)簽： system-on-chip integrated designed reusable
上傳時間： 2015-11-17
上傳用戶：D&L37
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