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  • 71M6541演示板用戶手冊(cè)

    The Maxim Integrated 71M6541-DB REV 3.0 Demo Board is a demonstration board for evaluating the 71M6541 device for single-phase electronic energy metering applications in conjunction with the Remote Sensor Inter-face. It incorporates a 71M6541 integrated circuit, a 71M6601 Remote Interface IC, peripheral circuitry such as a serial EEPROM, emulator port, and on-board power supply. A serial to USB converter allows communication to a PC through a USB port. The Demo Board allows the evaluation of the 71M6541 energy meter chip for measurement accuracy and overall system use.

    標(biāo)簽: 71M6541 演示板 用戶手冊(cè)

    上傳時(shí)間: 2013-11-06

    上傳用戶:雨出驚人love

  • Heart-RateFitness Monitors Go Wireless

    Abstract: This article explains the recent trend in heart-rate and fitness monitors to go wireless toeliminate cables to allow free movement, and allow convenient data collection without the need to plug intheir devices. It details a typical wireless system, using the MAX1472 crystal-referenced Phase-lockedloop (PLL) VHF/UHF transmitter.

    標(biāo)簽: Heart-RateFitness Monitors Wireless Go

    上傳時(shí)間: 2013-11-11

    上傳用戶:xiaowei314

  • XAPP806 -決定DDR反饋時(shí)鐘的最佳DCM相移

    This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microprocessor application. This reference system also uses a DCM that isconfigured so that the phase of its output clock can be changed while the system is running anda GPIO core that controls that phase shift. The GPIO output is controlled by a softwareapplication that can be run on a PowerPC® 405 or Microblaze™ microprocessor.

    標(biāo)簽: XAPP 806 DDR DCM

    上傳時(shí)間: 2014-11-26

    上傳用戶:erkuizhang

  • 擴(kuò)頻通信芯片STEL-2000A的FPGA實(shí)現(xiàn)

    針對(duì)傳統(tǒng)集成電路(ASIC)功能固定、升級(jí)困難等缺點(diǎn),利用FPGA實(shí)現(xiàn)了擴(kuò)頻通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核實(shí)現(xiàn)NCO模塊,在下變頻模塊調(diào)用了硬核乘法器并引入CIC濾波器進(jìn)行低通濾波,給出了DQPSK解調(diào)的原理和實(shí)現(xiàn)方法,推導(dǎo)出一種簡(jiǎn)便的引入?仔/4固定相移的實(shí)現(xiàn)方法。采用模塊化的設(shè)計(jì)方法使用VHDL語言編寫出源程序,在Virtex-II Pro 開發(fā)板上成功實(shí)現(xiàn)了整個(gè)系統(tǒng)。測(cè)試結(jié)果表明該系統(tǒng)正確實(shí)現(xiàn)了STEL-2000A的核心功能。 Abstract:  To overcome drawbacks of ASIC such as fixed functionality and upgrade difficulty, FPGA was used to realize the core functions of STEL-2000A. This paper used the DDS IP core provided by ISE to realize the NCO module, called hard core multiplier and implemented CIC filter in the down converter, described the principle and implementation detail of the demodulation of DQPSK, and derived a simple method to introduce a fixed phase shift of ?仔/4. The VHDL source code was designed by modularity method , and the complete system was successfully implemented on Virtex-II Pro development board. Test results indicate that this system successfully realize the core function of the STEL-2000A.

    標(biāo)簽: STEL 2000 FPGA 擴(kuò)頻通信

    上傳時(shí)間: 2013-11-19

    上傳用戶:neu_liyan

  • 基于CPLD的QDPSK調(diào)制解調(diào)電路設(shè)計(jì)

    為了在CDMA系統(tǒng)中更好地應(yīng)用QDPSK數(shù)字調(diào)制方式,在分析四相相對(duì)移相(QDPSK)信號(hào)調(diào)制解調(diào)原理的基礎(chǔ)上,設(shè)計(jì)了一種QDPSK調(diào)制解調(diào)電路,它包括串并轉(zhuǎn)換、差分編碼、四相載波產(chǎn)生和選相、相干解調(diào)、差分譯碼和并串轉(zhuǎn)換電路。在MAX+PLUSⅡ軟件平臺(tái)上,進(jìn)行了編譯和波形仿真。綜合后下載到復(fù)雜可編程邏輯器件EPM7128SLC84-15中,測(cè)試結(jié)果表明,調(diào)制電路能正確選相,解調(diào)電路輸出數(shù)據(jù)與QDPSK調(diào)制輸入數(shù)據(jù)完全一致,達(dá)到了預(yù)期的設(shè)計(jì)要求。 Abstract:  In order to realize the better application of digital modulation mode QDPSK in the CDMA system, a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase,and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.

    標(biāo)簽: QDPSK CPLD 調(diào)制解調(diào) 電路設(shè)計(jì)

    上傳時(shí)間: 2013-10-28

    上傳用戶:jyycc

  • 基于Multisim 10的矩形波信號(hào)發(fā)生器仿真與實(shí)現(xiàn)

    在Multisim 10軟件環(huán)境下,設(shè)計(jì)一種由運(yùn)算放大器構(gòu)成的精確可控矩形波信號(hào)發(fā)生器,結(jié)合系統(tǒng)電路原理圖重點(diǎn)闡述了各參數(shù)指標(biāo)的實(shí)現(xiàn)與測(cè)試方法。通過改變RC電路的電容充、放電路徑和時(shí)間常數(shù)實(shí)現(xiàn)了占空比和頻率的調(diào)節(jié),通過多路開關(guān)投入不同數(shù)值的電容實(shí)現(xiàn)了頻段的調(diào)節(jié),通過電壓取樣和同相放大電路實(shí)現(xiàn)了輸出電壓幅值的調(diào)節(jié)并提高了電路的帶負(fù)載能力,可作為頻率和幅值可調(diào)的方波信號(hào)發(fā)生器。Multisim 10仿真分析及應(yīng)用電路測(cè)試結(jié)果表明,電路性能指標(biāo)達(dá)到了設(shè)計(jì)要求。 Abstract:  Based on Multisim 10, this paper designed a kind of rectangular-wave signal generator which could be controlled exactly composed of operational amplifier, the key point was how to implement and test the parameter indicators based on the circuit diagram. The duty and the frequency were adjusted by changing the time constant and the way of charging and discharging of the capacitor, the width of frequency was adjusted by using different capacitors provided with multiple switch, the amplitude of output voltage was adjusted by sampling voltage and using in-phase amplifier circuit,the ability of driving loads was raised, the circuit can be used as squarewave signal generator whose frequency and amplitude can be adjusted. The final simulation results of Multisim 10 and the tests of applicable circuit show that the performance indicators of the circuit meets the design requirements.

    標(biāo)簽: Multisim 矩形波 信號(hào)發(fā)生器 仿真

    上傳時(shí)間: 2014-01-21

    上傳用戶:shen007yue

  • TMS320C31 存儲(chǔ)器引導(dǎo)方式程序的制作 1

    TMS320C31 存儲(chǔ)器引導(dǎo)方式程序的制作 1, 先將.out 文件轉(zhuǎn)換為.lo 文件; 2, 將.lo 文件寫入EPROM

    標(biāo)簽: 320C TMS 320 C31

    上傳時(shí)間: 2015-05-07

    上傳用戶:luopoguixiong

  • 簡(jiǎn)單混合衰落信道 This mfile inputs an unmodulated sinewave through a simple Rayleigh two path fading channe

    簡(jiǎn)單混合衰落信道 This mfile inputs an unmodulated sinewave through a simple Rayleigh two path fading channel and shows the output with phase, gain, and attenuation characteristics via animation.

    標(biāo)簽: unmodulated Rayleigh sinewave through

    上傳時(shí)間: 2015-05-17

    上傳用戶:CSUSheep

  • Random Number Generators(隨機(jī)數(shù)生成)包括gaussian random number generator、uniform random number generator、lo

    Random Number Generators(隨機(jī)數(shù)生成)包括gaussian random number generator、uniform random number generator、low-frequency hold generator、1/f noise generator等5種隨機(jī)信號(hào)生成的c源代碼

    標(biāo)簽: generator random number Generators

    上傳時(shí)間: 2014-12-07

    上傳用戶:edisonfather

  • C++ Demystified: A Self-Teaching Guide by Jeff Kent ISBN:0072253703 McGraw-Hill/Osborne © 20

    C++ Demystified: A Self-Teaching Guide by Jeff Kent ISBN:0072253703 McGraw-Hill/Osborne © 2004 This hands-on, step-by-step resource will guide you through each phase of C++ programming, providing you with the foundation to discover how computer programs and programming languages work.

    標(biāo)簽: Self-Teaching Demystified McGraw-Hill 0072253703

    上傳時(shí)間: 2013-12-13

    上傳用戶:1427796291

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