基于子空間的OFDM信道盲估計，可直接運行
上傳時間： 2014-12-22
上傳用戶：wl9454
基于子空間的MIMO-OFDM系統的盲信道估計，可直接運行
上傳時間： 2015-12-01
上傳用戶：Andy123456
基于訓練序列的OFDM信道估計仿真程序，可直接運行
上傳時間： 2014-01-09
上傳用戶：asdkin
完美的OFDM仿真程序MATLAB（帶導頻）,可直接運行
上傳時間： 2014-01-11
上傳用戶：hfmm633
單發多收OFDM系統基于子空間方法的信道估計，可直接運行
上傳時間： 2014-12-06
上傳用戶：253189838
OFDM是wimax的關鍵技術，這個源代碼就是wimax OFDM的詳細實現。
上傳時間： 2015-12-02
上傳用戶：hasan2015
There are many different (and often confusing) terms associated with clock-based devices. This application note attempts to clarify these terms, and hence serves as a comprehensive reference on clock terminology. This application note can be divided into two sections. The first section describes and distinguishes between various clock sources available today. The second section defines and distinguishes between various parameters used to describe clocks. This section also provides methods of measuring some of these parameters.
標簽： clock-based associated different confusing
上傳時間： 2015-12-02
上傳用戶：sssl
Jitter is extremely important in systems using PLL-based clock drivers. The effects of jitter range from not having any effect on system operation to rendering the system completely non-functional. This application note provides the reader with a clear understanding of jitter in high-speed systems. It introduces the reader to various kinds of jitter in high-speed systems, their causes and their effects, and methods of reducing jitter. This application note will concentrate on jitter in PLL-based frequency synthesizers.
標簽： extremely PLL-based important drivers
上傳時間： 2014-11-25
上傳用戶：asddsd
Cypress Semiconductor makes a variety of PLL-based clock generators. This application note provides a set of recommendations to optimize usage of Cypress clock devices in a system. The application note begins with recommended termination techniques for clock generators. Subsequently, power supply filtering and bypassing is discussed. Finally, the application note provides some recommendations on board layout.
標簽： Semiconductor application generators PLL-based
上傳時間： 2013-12-20
上傳用戶：水中浮云
AN FPGA-BASED IMPLEMENTATION FOR MEDIAN FILTER MEETING THE REAL-TIME REQUIREMENTS OF AUTOMATED VISUAL INSPECTION SYSTEMS
標簽： IMPLEMENTATION REQUIREMENTS FPGA-BASED AUTOMATED
上傳時間： 2013-12-13
上傳用戶：litianchu
