The purpose of this LAB is to introduce the concept of FSMs with a datapath, and to
study the usage of more complex test benches. Also, we enforce a rudimentary design
methodology by assuming that the students are part of a bigger project, and have no
knowledge of VHDL-implementation of the datapath (made by a hypothetical other
group) other than its predefined Entity Interface until they come to the LAB.
The rest of this document is structured as follows: Section 2 describes some prelimi-
nary reading and exercises that should be done before the LAB. Section 3 details the
design tasks that should be carried out to pass this LAB.
標簽：
introduce
datapath
purpose
concept
上傳時間：
2014-01-24
上傳用戶：熊少鋒
