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JE-Analysis

  • matlab通信仿真psk誤碼分析

    MATLAB仿真通信PSK誤碼分析,主要用來測試SNR從0到10時的系統性能-MATLAB simulation PSK communication error analysis

    標簽: matlab psk 通信 仿真

    上傳時間: 2013-04-24

    上傳用戶:924484786

  • stbc_ofdm(time)

    從時域分析比較了ofdm和stbc與ofdm結合的性能差別-from time-domain analysis and comparison of OFDM stbc OFDM combined wi

    標簽: stbc_ofdm time

    上傳時間: 2013-06-05

    上傳用戶:caozhizhi

  • Debussy 50

    Debussy軟件 Debussy是NOVAS Software, Inc(思源科技)發展的HDL Debug & Analysis tool,這套軟體主要不是用來跑模擬或看波形

    標簽: Debussy 50

    上傳時間: 2013-07-08

    上傳用戶:fywz

  • C++寫的DTMF算法

    ·詳細說明:C++寫的DTMF算法,內含一個pcm數據文件,讀入文件并分析按鍵-c writes the DTMF algorithm, contains a pcm data file, the read-in document and the analysis pressed key。文件列表:   DTMF   ....\DTMF.cpp   ....\DTMF.

    標簽: DTMF 算法

    上傳時間: 2013-04-24

    上傳用戶:Miyuki

  • 數字圖像處理與分析(劉定生老師)

    ·詳細說明:數字圖像處理與分析-劉定生老師, 非常好的講述數字圖像處理的課件,包括所有基本的圖像處理知識,Image processing ang analysis by Teacher LiuDingsheng, very good for you to study the knowledge of image processing

    標簽: 數字圖像處理

    上傳時間: 2013-04-24

    上傳用戶:visit8888

  • an fpga implementation of the image space reconstruction algorithm for hyperspectral imaging analysi

    1.an fpga implementation of the image space reconstruction algorithm for hyperspectral imaging analysis\r\n2. fpga implemention of a median filter\r\n3. fpga implementation of digital filters\r\n4.hardware acceleration of edge detection algorithm on fpgas

    標簽: implementation reconstruction hyperspectral algorithm

    上傳時間: 2013-08-07

    上傳用戶:ytulpx

  • RF至數字接收器的信號鏈噪聲分析

      Designers of signal receiver systems often need to performcascaded chain analysis of system performancefrom the antenna all the way to the ADC. Noise is a criticalparameter in the chain analysis because it limits theoverall sensitivity of the receiver. An application’s noiserequirement has a signifi cant infl uence on the systemtopology, since the choice of topology strives to optimizethe overall signal-to-noise ratio, dynamic range andseveral other parameters. One problem in noise calculationsis translating between the various units used by thecomponents in the chain: namely the RF, IF/baseband,and digital (ADC) sections of the circuit.

    標簽: 數字接收器 信號鏈 噪聲分析

    上傳時間: 2014-12-05

    上傳用戶:cylnpy

  • 高速數字系統設計下載pdf

    高速數字系統設計下載pdf:High-Speed Digital SystemDesign—A Handbook ofInterconnect Theory and DesignPracticesStephen H. HallGarrett W. HallJames A. McCallA Wiley-Interscience Publication JOHN WILEY & SONS, INC.New York • Chichester • Weinheim • Brisbane • Singapore • TorontoCopyright © 2000 by John Wiley & Sons, Inc.speeddigital systems at the platform level. The book walks the reader through everyrequired concept, from basic transmission line theory to digital timing analysis, high-speedmeasurement techniques, as well as many other topics. In doing so, a unique balancebetween theory and practical applications is achieved that will allow the reader not only tounderstand the nature of the problem, but also provide practical guidance to the solution.The level of theoretical understanding is such that the reader will be equipped to see beyondthe immediate practical application and solve problems not contained within these pages.Much of the information in this book has not been needed in past digital designs but isabsolutely necessary today. Most of the information covered here is not covered in standardcollege curricula, at least not in its focus on digital design, which is arguably one of the mostsignificant industries in electrical engineering.The focus of this book is on the design of robust high-volume, high-speed digital productssuch as computer systems, with particular attention paid to computer busses. However, thetheory presented is applicable to any high-speed digital system. All of the techniquescovered in this book have been applied in industry to actual digital products that have beensuccessfully produced and sold in high volume.Practicing engineers and graduate and undergraduate students who have completed basicelectromagnetic or microwave design classes are equipped to fully comprehend the theorypresented in this book. At a practical level, however, basic circuit theory is all thebackground required to apply the formulas in this book.

    標簽: 高速數字 系統設計

    上傳時間: 2013-10-26

    上傳用戶:縹緲

  • 模擬電路設計CMOS Analog Circuit Desi

    I.1 IntroductionI.2 Analog Integrated Circuit DesignI.3 Technology OverviewI.4 NotationI.5 Analog Circuit Analysis Techniques

    標簽: Circuit Analog CMOS Desi

    上傳時間: 2013-10-29

    上傳用戶:jokey075

  • Design Safe Verilog State Machine(Synplicity)

      One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability analysis to determine all the states that could possibly bereached, and optimize away all states and transition logic that can not be reached.Thus, producing a highly optimal final implementation of the state machine.

    標簽: Synplicity Machine Verilog Design

    上傳時間: 2013-10-23

    上傳用戶:司令部正軍級

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