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Intellectual

  • Intellectual property rights in network,就是DRM應(yīng)用在網(wǎng)絡(luò)環(huán)境的介紹。

    Intellectual property rights in network,就是DRM應(yīng)用在網(wǎng)絡(luò)環(huán)境的介紹。

    標(biāo)簽: Intellectual property network rights

    上傳時(shí)間: 2015-08-17

    上傳用戶:ljmwh2000

  • Intellectual Property Right

    Intellectual Property Right

    標(biāo)簽: Intellectual Property Right

    上傳時(shí)間: 2017-09-01

    上傳用戶:caiiicc

  • 板級(jí)光互連協(xié)議研究與FPGA實(shí)現(xiàn)

    隨著集成電路頻率的提高和多核時(shí)代的到來(lái),傳統(tǒng)的高速電互連技術(shù)面臨著越來(lái)越嚴(yán)重的瓶頸問(wèn)題,而高速下的光互連具有電互連無(wú)法比擬的優(yōu)勢(shì),成為未來(lái)電互連的理想替代者,也成為科學(xué)研究的熱點(diǎn)問(wèn)題。目前,由OIF(Optical Intemetworking Forum,光網(wǎng)絡(luò)論壇)論壇提出的甚短距離光互連協(xié)議,主要面向主干網(wǎng),其延遲、功耗、兼容性等都不能滿足板間、芯片間光互連的需要,因此,研究定制一種適用于板級(jí)、芯片級(jí)的光互連協(xié)議具有非常重要的研究意義。 本論文將協(xié)議功能分為數(shù)據(jù)鏈路層和物理層來(lái)設(shè)計(jì),鏈路層功能包括了協(xié)議原語(yǔ)設(shè)計(jì),數(shù)據(jù)幀格式和數(shù)據(jù)傳輸流程設(shè)計(jì),流量控制機(jī)制設(shè)計(jì),協(xié)議通道初始化設(shè)計(jì),錯(cuò)誤檢測(cè)機(jī)制設(shè)計(jì)和空閑字符產(chǎn)生、時(shí)鐘補(bǔ)償方式設(shè)計(jì);物理層功能包含了數(shù)據(jù)的串化和解串功能,多通道情況下的綁定功能,數(shù)據(jù)編解碼功能等。 然后,文章采用FPGA(Field Programmable Gate Array,現(xiàn)場(chǎng)可編程門陣列)技術(shù)實(shí)現(xiàn)了定制協(xié)議的單通道模式。重點(diǎn)是數(shù)據(jù)鏈路層的實(shí)現(xiàn),物理層采用定制具備其功能的IP(Intellectual Property,知識(shí)產(chǎn)權(quán))——RocketIO來(lái)實(shí)現(xiàn)。實(shí)現(xiàn)的過(guò)程中,采用了Xilinx公司的ISE(Integrated System Environment,集成開(kāi)發(fā)環(huán)境)開(kāi)發(fā)流程,使用的設(shè)計(jì)工具包括:ISE,ModelSim,Synplify Pro,ChipScope等。 最后,本文對(duì)實(shí)現(xiàn)的協(xié)議進(jìn)行了軟件仿真和上扳測(cè)試,訪真和測(cè)試結(jié)果表明,實(shí)現(xiàn)的單通道模式,支持的最高串行頻率達(dá)到3.5GHz,完全滿足了光互連驗(yàn)證系統(tǒng)初期的要求,同時(shí)由RocketIO的高速串行差分口得到的眼圖質(zhì)量良好,表明對(duì)物理層IP的定制是成功的。

    標(biāo)簽: FPGA 板級(jí) 光互連 協(xié)議研究

    上傳時(shí)間: 2013-06-28

    上傳用戶:guh000

  • PCI ExpressTM Architecture

    PCI ExpressTM Architecture Add-in Card Compliance Checklist for the PCI Express Base 1.0a SpecificationThe PCI Special Interest Group disclaims all warranties and liability for the use of this document and the information contained herein and assumes no responsibility for any errors that may appear in this document, nor does the PCI Special Interest Group make a commitment to update the information contained herein.Contact the PCI Special Interest Group office to obtain the latest revision of this checklistQuestions regarding the ths document or membership in the PCI Special Interest Group may be forwarded tPCI Special Interest Group5440 SW Westgate Drive #217Portland, OR 97221Phone: 503-291-2569Fax: 503-297-1090 DISCLAIMERThis document is provided "as is" with no warranties whatsoever, including any warranty of merchantability, noninfringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample.  The PCI SIG disclaims all liability for infringement of proprietary rights, relating to use of information in this specification.  No license, express or implied, by estoppel or otherwise, to any Intellectual property rights is granted herein.

    標(biāo)簽: Architecture ExpressTM PCI

    上傳時(shí)間: 2013-11-03

    上傳用戶:gy592333

  • 射頻集成電路設(shè)計(jì)John Rogers(Radio Freq

    Radio Frequency Integrated Circuit Design I enjoyed reading this book for a number of reasons. One reason is that itaddresses high-speed analog design in the context of microwave issues. This isan advanced-level book, which should follow courses in basic circuits andtransmission lines. Most analog integrated circuit designers in the past workedon applications at low enough frequency that microwave issues did not arise.As a consequence, they were adept at lumped parameter circuits and often notcomfortable with circuits where waves travel in space. However, in order todesign radio frequency (RF) communications integrated circuits (IC) in thegigahertz range, one must deal with transmission lines at chip interfaces andwhere interconnections on chip are far apart. Also, impedance matching isaddressed, which is a topic that arises most often in microwave circuits. In mycareer, there has been a gap in comprehension between analog low-frequencydesigners and microwave designers. Often, similar issues were dealt with in twodifferent languages. Although this book is more firmly based in lumped-elementanalog circuit design, it is nice to see that microwave knowledge is brought inwhere necessary.Too many analog circuit books in the past have concentrated first on thecircuit side rather than on basic theory behind their application in communications.The circuits usually used have evolved through experience, without asatisfying Intellectual theme in describing them. Why a given circuit works bestcan be subtle, and often these circuits are chosen only through experience. Forthis reason, I am happy that the book begins first with topics that require anIntellectual approach—noise, linearity and filtering, and technology issues. Iam particularly happy with how linearity is introduced (power series). In therest of the book it is then shown, with specific circuits and numerical examples,how linearity and noise issues arise.

    標(biāo)簽: Rogers Radio John Freq

    上傳時(shí)間: 2014-12-23

    上傳用戶:han_zh

  • Stellaris(群星)單片機(jī)的片上FLASH編程(英)

    Stellaris(群星)單片機(jī)的片上FLASH編程(英) INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH LUMINARY MICRO PRODUCTS. NO LICENSE,EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY Intellectual PROPERTY RIGHTS IS GRANTED BY THISDOCUMENT. EXCEPT AS PROVIDED IN LUMINARY MICRO’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS,LUMINARY MICRO ASSUMES NO LIABILITY WHATSOEVER, AND LUMINARY MICRO DISCLAIMS ANY EXPRESS OR IMPLIEDWARRANTY, RELATING TO SALE AND/OR USE OF LUMINARY MICRO’S PRODUCTS INCLUDING LIABILITY OR WARRANTIESRELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHTOR OTHER Intellectual PROPERTY RIGHT. LUMINARY MICRO’S PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL,LIFE SAVING, OR LIFE-SUSTAINING APPLICATIONS.

    標(biāo)簽: Stellaris FLASH 單片機(jī) 編程

    上傳時(shí)間: 2013-10-22

    上傳用戶:JamesB

  • Stellaris(群星)單片機(jī)加上32KB串行SRAM(英

    Stellaris(群星)單片機(jī)加上32KB串行SRAM(英) INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH LUMINARY MICRO PRODUCTS. NO LICENSE,EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY Intellectual PROPERTY RIGHTS IS GRANTED BY THISDOCUMENT. EXCEPT AS PROVIDED IN LUMINARY MICRO’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS,LUMINARY MICRO ASSUMES NO LIABILITY WHATSOEVER, AND LUMINARY MICRO DISCLAIMS ANY EXPRESS OR IMPLIEDWARRANTY, RELATING TO SALE AND/OR USE OF LUMINARY MICRO’S PRODUCTS INCLUDING LIABILITY OR WARRANTIESRELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHTOR OTHER Intellectual PROPERTY RIGHT. LUMINARY MICRO’S PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL,LIFE SAVING, OR LIFE-SUSTAINING APPLICATIONS.

    標(biāo)簽: Stellaris SRAM 32 KB

    上傳時(shí)間: 2013-11-22

    上傳用戶:lixqiang

  • UART測(cè)試程序-AT91SAM9260

    UART測(cè)試程序-AT91SAM9260://* The software is delivered "AS IS" without warranty or condition of any//* kind, either express, implied or statutory. This includes without//* limitation any warranty or condition with respect to merchantability or//* fitness for any particular purpose, or against the infringements of//* Intellectual property rights of others.

    標(biāo)簽: UART 9260 SAM AT

    上傳時(shí)間: 2013-11-18

    上傳用戶:yepeng139

  • wp379 AXI4即插即用IP

    In the past decade, the size and complexity of manyFPGA designs exceeds the time and resourcesavailable to most design teams, making the use andreuse of Intellectual Property (IP) imperative.However, integrating numerous IP blocks acquiredfrom both internal and external sources can be adaunting challenge that often extends, rather thanshortens, design time. As today's designs integrateincreasing amounts of functionality, it is vital thatdesigners have access to proven, up-to-date IP fromreliable sources.

    標(biāo)簽: AXI4 379 wp 即插即用

    上傳時(shí)間: 2013-11-15

    上傳用戶:lyy1234

  • PLD對(duì)FPGA數(shù)據(jù)加密

    SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your Intellectual property from others in an architecture where the part is externally programmed?

    標(biāo)簽: FPGA PLD 數(shù)據(jù)加密

    上傳時(shí)間: 2013-11-06

    上傳用戶:wl9454

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