In order to improve the spectral efficiency in wireless communications, multiple antennas are employed at both transmitter and receiver sides, where the resulting system is referred to as the multiple-input multiple-output (MIMO) system. In MIMO systems, it is usually requiredto detect signals jointly as multiple signals are transmitted through multiple signal paths between the transmitter and the receiver. This joint detection becomes the MIMO detection.
標簽： Complexity Detection MIMO Low
上傳時間： 2020-05-27
上傳用戶：shancjb
Use of multiple antennas at both ends of wireless links is the result of the natural progression of more than four decades of evolution of adaptive antenna technology. Recent advances have demonstrated that multiple- input-multiple-output (MIMO) wireless systems can achieve impressive increases in overall system performance.
標簽： Technology System MIMO
上傳時間： 2020-05-28
上傳用戶：shancjb
The family of recent wireless standards included the optional employment of Multiple-Input Multiple-Output(MIMO)techniques.This was motivatedby the observationaccordingto the classic Shannon–Hartley law that the achievable channel capacity increases logarithmically with the transmit power. In contrast, the MIMO capacity increases linearly with the number of transmit antennas, provided that the number of receive antennas is equal to the number of transmit antennas. With the further proviso that the total transmit power is increased in proportion to the number of transmit antennas, a linear capacity increase is achieved upon increasing the transmit power, which justifies the spectacular success of MIMO systems.
標簽： Multi-Functional Systems MIMO
上傳時間： 2020-05-31
上傳用戶：shancjb
The purpose of this book is to introduce the concept of the Multiple Input Multiple Output (MIMO) radio channel, which is an intelligent communication method based upon using multiple antennas. The book opens by explaining MIMO in layman’s terms to help stu- dents and people in industry working in related areas become easily familiarised with the concept. Therefore the structure of the book will be carefully arranged to allow a user to progress steadily through the chapters and understand the fundamental and mathematical principles behind MIMO through the visual and explanatory way in which they will be written. It is the intention that several references will also be provided, leading to further reading in this highly researched technology.
上傳時間： 2020-05-31
上傳用戶：shancjb
The multiple-input multiple-output (MIMO) technique provides higher bit rates and better reliability in wireless systems. The efficient design of RF transceivers has a vital impact on the implementation of this technique. This first book is com- pletely devoted to RF transceiver design for MIMO communications. The book covers the most recent research in practical design and applications and can be an important resource for graduate students, wireless designers, and practical engineers.
標簽： Transceiver Design RF
上傳時間： 2020-06-01
上傳用戶：shancjb
Driven by the desire to boost the quality of service of wireless systems closer to that afforded by wireline systems, space-time processing for multiple-input multiple-output (MIMO) wireless communications research has drawn remarkable interest in recent years. Excit- ing theoretical advances, complemented by rapid transition of research results to industry products and services, have created a vibrant and growing area that is already established by all counts. This offers a good opportunity to reflect on key developments in the area during the past decade and also outline emerging trends.
標簽： Space-Time Processing
上傳時間： 2020-06-01
上傳用戶：shancjb
Recent work has shown that convolutional networks can be substantially deeper, more accurate, and efficient to train if they contain shorter connections between layers close to the input and those close to the output. In this paper, we embrace this observation and introduce the Dense Convo- lutional Network (DenseNet), which connects each layer to every other layer in a feed-forward fashion.
標簽： Convolutional Connected Networks Densely
上傳時間： 2020-06-10
上傳用戶：shancjb
lm75A溫度數字轉換器 FPGA讀寫實驗Verilog邏輯源碼Quartus工程文件+文檔資料,FPGA為CYCLONE4系列中的EP4CE6E22C8. 完整的工程文件，可以做為你的學習設計參考。LM75A 是一個使用了內置帶隙溫度傳感器和模數轉換技術的溫度數字轉換器。它也是一個溫度檢測器，可提供一個過熱檢測輸出。LM75A 包含許多數據寄存器：配置寄存器用來存儲器件的某些配置，如器件的工作模式、OS 工作模式、OS 極性和OS 故障隊列等（在功能描述一節中有詳細描述）；溫度寄存器（Temp），用來存儲讀取的數字溫度；設定點寄存器（Tos & Thyst），用來存儲可編程的過熱關斷和滯后限制，器件通過2 線的串行I2C 總線接口與控制器通信。LM75A 還包含一個開漏輸出（OS），當溫度超過編程限制的值時該輸出有效。LM75A 有3 個可選的邏輯地址管腳，使得同一總線上可同時連接8個器件而不發生地址沖突。LM75A 可配置成不同的工作條件。它可設置成在正常工作模式下周期性地對環境溫度進行監控或進入關斷模式來將器件功耗降至最低。OS 輸出有2 種可選的工作模式：OS 比較器模式和OS 中斷模式。OS 輸出可選擇高電平或低電平有效。故障隊列和設定點限制可編程，為了激活OS 輸出，故障隊列定義了許多連續的故障。溫度寄存器通常存放著一個11 位的二進制數的補碼，用來實現0.125℃的精度。這個高精度在需要精確地測量溫度偏移或超出限制范圍的應用中非常有用。正常工作模式下，當器件上電時，OS 工作在比較器模式，溫度閾值為80℃，滯后75℃，這時，LM75A就可用作一個具有以上預定義溫度設定點的獨立的溫度控制器。module LM75_SEG_LED ( //input input sys_clk ,input sys_rst_n ,inout sda_port ,//output output wire seg_c1 ,output wire seg_c2 ,output wire seg_c3 ,output wire seg_c4 ,output reg seg_a ,output reg seg_b ,output reg seg_c ,output reg seg_e ,output reg seg_d ,output reg seg_f ,output reg seg_g ,output reg seg_h , output reg clk_sclk );//parameter define parameter WIDTH = 8;parameter SIZE = 8;//reg define reg [WIDTH-1:0] counter ;reg [9:0] counter_div ;reg clk_50k ;reg clk_200k ;reg sda ;reg enable ;
上傳時間： 2021-10-27
上傳用戶：
FPGA采樣AD9238數據并通過VGA波形顯示例程 Verilog邏輯源碼Quartus工程文件+文檔說明,FPGA型號Cyclone4E系列中的EP4CE6F17C8，Quartus版本17.1。ADC 模塊型號為 AN9238，最大采樣率 65Mhz，精度為12 位。實驗中把 AN9238 的 2 路輸入以波形方式在 HDMI 上顯示出來，我們可以用更加直觀的方式觀察波形，是一個數字示波器雛形。module top( input clk, input rst_n, output ad9238_clk_ch0, output ad9238_clk_ch1, input[11:0] ad9238_data_ch0, input[11:0] ad9238_data_ch1, //vga output output vga_out_hs, //vga horizontal synchronization output vga_out_vs, //vga vertical synchronization output[4:0] vga_out_r, //vga red output[5:0] vga_out_g, //vga green output[4:0] vga_out_b //vga blue);wire video_clk;wire video_hs;wire video_vs;wire video_de;wire[7:0] video_r;wire[7:0] video_g;wire[7:0] video_b;wire grid_hs;wire grid_vs;wire grid_de;wire[7:0] grid_r;wire[7:0] grid_g;wire[7:0] grid_b;wire wave0_hs;wire wave0_vs;wire wave0_de;wire[7:0] wave0_r;wire[7:0] wave0_g;wire[7:0] wave0_b;wire wave1_hs;wire wave1_vs;wire wave1_de;wire[7:0] wave1_r;wire[7:0] wave1_g;wire[7:0] wave1_b;wire adc_clk;wire adc0_buf_wr;wire[10:0] adc0_buf_addr;wire[7:0] adc0_bu
上傳時間： 2021-10-27
上傳用戶：qingfengchizhu
IIC接口E2PROM(AT24C64) 讀寫VERILOG 驅動源碼+仿真激勵文件:module i2c_dri #( parameter SLAVE_ADDR = 7'b1010000 , //EEPROM從機地址 parameter CLK_FREQ = 26'd50_000_000, //模塊輸入的時鐘頻率 parameter I2C_FREQ = 18'd250_000 //IIC_SCL的時鐘頻率 ) ( input clk , input rst_n , //i2c interface input i2c_exec , //I2C觸發執行信號 input bit_ctrl , //字地址位控制(16b/8b) input i2c_rh_wl , //I2C讀寫控制信號 input [15:0] i2c_addr , //I2C器件內地址 input [ 7:0] i2c_data_w , //I2C要寫的數據 output reg [ 7:0] i2c_data_r , //I2C讀出的數據 output reg i2c_done , //I2C一次操作完成 output reg i2c_ack , //I2C應答標志 0:應答 1:未應答 output reg scl , //I2C的SCL時鐘信號 inout sda , //I2C的SDA信號 //user interface output reg dri_clk //驅動I2C操作的驅動時鐘 );//localparam definelocalparam st_idle = 8'b0000_0001; //空閑狀態localparam st_sladdr = 8'b0000_0010; //發送器件地址(slave address)localparam st_addr16 = 8'b0000_0100; //發送16位字地址localparam st_addr8 = 8'b0000_1000; //發送8位字地址localparam st_data_wr = 8'b0001_0000; //寫數據(8 bit)localparam st_addr_rd = 8'b0010_0000; //發送器件地址讀localparam st_data_rd = 8'b0100_0000; //讀數據(8 bit)localparam st_stop = 8'b1000_0000; //結束I2C操作//reg definereg sda_dir ; //I2C數據(SDA)方向控制reg sda_out ; //SDA輸出信號reg st_done ; //狀態結束reg wr_flag ; //寫標志reg [ 6:0] cnt ; //計數reg [ 7:0] cur_state ; //狀態機當前狀態reg [ 7:0] next_state; //狀態機下一狀態reg [15:0] addr_t ; //地址reg [ 7:0] data_r ; //讀取的數據reg [ 7:0] data_wr_t ; //I2C需寫的數據的臨時寄存reg [ 9:0] clk_cnt ; //分頻時
標簽： iic 接口 e2prom at24c64 verilog 驅動 仿真
上傳時間： 2021-11-05
上傳用戶：
