FPGA in the software radio
標(biāo)簽： software radio FPGA the
上傳時(shí)間： 2013-09-06
上傳用戶：lina2343
ATmega128 circuit for ORCAD
標(biāo)簽： circuit ATmega ORCAD 128
上傳時(shí)間： 2013-09-10
上傳用戶：xuanjie
Many CAD users dismiss schematic capture as a necessary evil in the process of creating\r\nPCB layout but we have always disputed this point of view. With PCB layout now offering\r\nautomation of both component placement and track routing, getting the des
標(biāo)簽： schematic necessary creating dismiss
上傳時(shí)間： 2013-09-25
上傳用戶：baiom
Abstract: This tutorial discusses proper printed-circuit board (PCB) grounding for mixed-signal designs. Formost applications a simple method without cuts in the ground plane allows for successful PCB layouts withthis kind of IC. We begin this document with the basics: where the current flows. Later, we describe how toplace components and route signal traces to minimize problems with crosstalk. Finally, we move on toconsider power supply-currents and end by discussing how to extend what we have learned to circuits withmultiple mixed-signal ICs.
標(biāo)簽： PCB 正 印刷電路板 混合信號(hào)
上傳時(shí)間： 2013-11-04
上傳用戶：pol123
Abstract: Alexander Graham Bell patented twisted pair wires in 1881. We still use them today because they work so well. In addition we have the advantage ofincredible computer power within our world. Circuit simulators and filter design programs are available for little or no cost. We combine the twisted pair and lowpassfilters to produce spectacular rejection of radio frequency interference (RFI) and electromagnetic interference (EMI). We also illustrate use of a precision resistorarray to produce a customizable differential amplifier. The precision resistors set the gain and common mode rejection ratios, while we choose the frequencyresponse.
上傳時(shí)間： 2014-11-26
上傳用戶：Vici
The purpose of this application note is to show an example of how a digital potentiometer can be used in thefeedback loop of a step-up DC-DC converter to provide calibration and/or adjustment of the output voltage.The example circuit uses a MAX5025 step-up DC-DC converter (capable of generating up to 36V,120mWmax) in conjunction with a DS1845, 256 position, NV digital potentiometer. For this example, the desiredoutput voltage is 32V, which is generated from an input supply of 5V. The output voltage can be adjusted in35mV increments (near 32V) and span a range wide enough to account for resistance, potentiometer and DCDCconverter tolerances (27.6V to 36.7V).
標(biāo)簽： DC-DC 數(shù)字電位器 升壓型 校準(zhǔn)
上傳時(shí)間： 2014-12-23
上傳用戶：781354052
Many applications require a clock signal to be synchronous, phase-locked, or derived fromanother signal, such as a data signal or another clock. This type of clock circuit is important in
標(biāo)簽： XAPP DPLL 854 數(shù)字鎖相環(huán)
上傳時(shí)間： 2014-12-23
上傳用戶：qq21508895
Abstract: Transimpedance amplifiers (TIAs) are widely used to translate the current output of sensors like photodiode-to-voltagesignals, since several circuits and instruments can only accept voltage input. An operational amplifier with a feedback resistor fromoutput to the inverting input is the most straightforward implementation of such a TIA. However, even this simple TIA circuit requirescareful trade-offs among noise gain, offset voltage, bandwidth, and stability. Clearly stability in a TIA is essential for good, reliableperformance. This application note explains the empirical calculations for assessing stability and then shows how to fine-tune theselection of the feedback phase-compensation capacitor.
標(biāo)簽： Transimpedance Stabilize Amplifier Your
上傳時(shí)間： 2013-11-13
上傳用戶：daoyue
This unique guide to designing digital VLSI circuits takes a top-down approach, reflecting the natureof the design process in industry. Starting with architecture design, the book explains the why andhow of digital design, using the physics that designers need to know, and no more.Covering system and component aspects, design verification, VHDL modelling, clocking, signalintegrity, layout, electricaloverstress, field-programmable logic, economic issues, and more, thescope of the book is singularly comprehensive.
標(biāo)簽： Integrated Digital Circuit Design
上傳時(shí)間： 2013-11-04
上傳用戶：life840315
This application note provides a detailed description of themetastable behavior in PLDs from both circuit and statisticalviewpoints. Additionally, the information on the metastablecharacteristics of Cypress PLDs presented here can help youachieve any desired degree of reliability.
標(biāo)簽： PLD 亞穩(wěn)態(tài)
上傳時(shí)間： 2013-10-23
上傳用戶：gtzj
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