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  • Data Structures and Algorithms with Object-Oriented Design Patterns in Java Bruno R. Preiss B.A.S

    Data Structures and Algorithms with Object-Oriented Design Patterns in Java Bruno R. Preiss B.A.Sc., M.A.Sc., Ph.D., P.Eng. Associate Professor Department of Electrical and Computer Engineering University of Waterloo, Waterloo, Canada

    標(biāo)簽: B.A.S R. Object-Oriented Algorithms

    上傳時間: 2017-03-07

    上傳用戶:z754970244

  • B型剩余電流保護(hù)器設(shè)計(jì)

    隨著光伏發(fā)電系統(tǒng)快速發(fā)展,以及電動汽車充電樁的普及,傳統(tǒng)的剩余電流保護(hù)器無法滿足實(shí)際需求。介紹了一款B型剩余電流保護(hù)器,采用磁調(diào)制剩余電流互感器和零序電流互感器采集剩余電流。根據(jù)GB/T 22794—2017標(biāo)準(zhǔn)要求,可識別1 kHz及以下的正弦交流、帶和不帶直流分量的脈動直流、平滑直流等剩余電流信號。經(jīng)信號調(diào)理電路將電壓信號送到單片機(jī)進(jìn)行采集和判斷。通過試驗(yàn)測試,該樣機(jī)在測試精度和速度上均符合國家標(biāo)準(zhǔn)的相關(guān)要求。The rapid development of photovoltaic power generation systems and the popularity of electric vehicle charging piles make the traditional residual current protective devices unable to meet the actual demand.This paper proposed a type B residual current protective device,which uses the magnetically modulated residual current transformer and the zero sequence current transformer to acquire the residual current.According to the requirements of GB/T 22794—2017,the type B residual current protective device can detect sinusoidal AC residual current of 1kHz and below 1kHz,pulsating DC residual current with and without DC component,smooth DC residual current and so on.The signal processing circuit sends the voltage signal to the MCU for acquisition and judgment.Through experimental tests,the device meets the relevant requirements of national standards in terms of test accuracy and speed.

    標(biāo)簽: 電流保護(hù)器

    上傳時間: 2022-03-27

    上傳用戶:

  • * "Copyright (c) 2006 Robert B. Reese ("AUTHOR")" * All rights reserved. * (R. Reese, reese@ece.

    * "Copyright (c) 2006 Robert B. Reese ("AUTHOR")" * All rights reserved. * (R. Reese, reese@ece.msstate.edu, Mississippi State University) * IN NO EVENT SHALL THE "AUTHOR" BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE "AUTHOR" * HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

    標(biāo)簽: Reese B. R. Copyright

    上傳時間: 2015-09-24

    上傳用戶:mpquest

  • Verilog HDL: Magnitude For a vector (a,b), the magnitude representation is the following: A c

    Verilog HDL: Magnitude For a vector (a,b), the magnitude representation is the following: A common approach to implementing these arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC algorithm calculates the trigonometric functions of sine, cosine, magnitude, and phase using an iterative process. It is made up of a series of micro-rotations of the vector by a set of predetermined constants, which are powers of two. Using binary arithmetic, this algorithm essentially replaces multipliers with shift and add operations. In a Stratix™ device, it is possible to calculate some of these arithmetic functions directly, without having to implement the CORDIC algorithm.

    標(biāo)簽: representation Magnitude the magnitude

    上傳時間: 2013-12-24

    上傳用戶:金宜

  • design LP,HP,B S digital Butterworth and Chebyshev filter. All array has been specified internally

    design LP,HP,B S digital Butterworth and Chebyshev filter. All array has been specified internally,so user only need to input f1,f2,f3,f4,fs(in hz), alpha1,alpha2(in db) and iband (to specify the type of to design). This program output hk(z)=bk(z)/ak(z),k=1,2,..., ksection and the freq.

    標(biāo)簽: Butterworth internally Chebyshev specified

    上傳時間: 2015-11-08

    上傳用戶:253189838

  • 基于verilog HDL的自動售貨機(jī)控制電路設(shè)計(jì): 可以對5種不同種類的貨物進(jìn)行自動售貨,價(jià)格分別為A=1.00,B=1.50,C=1.80,D=3.10,E=5.00 。售貨機(jī)可以接受1元,5角

    基于verilog HDL的自動售貨機(jī)控制電路設(shè)計(jì): 可以對5種不同種類的貨物進(jìn)行自動售貨,價(jià)格分別為A=1.00,B=1.50,C=1.80,D=3.10,E=5.00 。售貨機(jī)可以接受1元,5角,1角三種硬幣(即有三種輸入信號IY,IWJ,IYJ),并且在一個3位7段LED(二位代表元,一位代表角)顯示以投入的總錢數(shù),最大9.90元,如果大于該數(shù)值,新投入的硬幣會退出,選擇貨物的輸入信號Ia,Ib,Ic,Id,Ie和一個放棄信號In,輸出指示信號為 Sa, Sb ,Sc ,Sd, Se 分別表示售出相應(yīng)的貨物,同時輸出的信號yuan, jiao代表找零,相應(yīng)每個脈沖代表找零相應(yīng)的硬幣,上述輸入和輸出信號均是一個固定寬度的脈沖信號。

    標(biāo)簽: verilog 1.00 1.50 1.80

    上傳時間: 2016-07-12

    上傳用戶:lanwei

  • Matlab實(shí)現(xiàn): Erlang B model(M/M/n/n)與 Erlang C model排隊(duì)系統(tǒng)的模擬

    Matlab實(shí)現(xiàn): Erlang B model(M/M/n/n)與 Erlang C model排隊(duì)系統(tǒng)的模擬,并畫出阻塞概率(P)與負(fù)載(A=lamda/miu in Erlang)的關(guān)系圖。用法:運(yùn)行RunMe

    標(biāo)簽: Erlang model Matlab 排隊(duì)系統(tǒng)

    上傳時間: 2014-01-02

    上傳用戶:wcl168881111111

  • basic.c */ /**//* Project:NeuroBasic, basic package*//**/ /* Survey:This is a simple Basic b-code

    basic.c */ /**//* Project:NeuroBasic, basic package*//**/ /* Survey:This is a simple Basic b-code compiler which*/ /*can be used as a comfortable command shell for */ /* any program. The actual compiler is found in */ /*compiler.c.*/ /*The functions m_fctptr() and user_server()*/ /*build an interface to an

    標(biāo)簽: basic NeuroBasic Project package

    上傳時間: 2017-02-15

    上傳用戶:xymbian

  • I. C. Wong, Z. Shen, J. G. Andrews, and B. L. Evans, ``A Low Complexity Algorithm for Proportional R

    I. C. Wong, Z. Shen, J. G. Andrews, and B. L. Evans, ``A Low Complexity Algorithm for Proportional Resource Allocation in OFDMA Systems , Proc. IEEE Int. Work. Signal Processing Systems, 針對這篇文章給出的源代碼

    標(biāo)簽: I. C. B. G.

    上傳時間: 2014-01-24

    上傳用戶:zhichenglu

  • 21世紀(jì)大學(xué)新型參考教材系列 集成電路B 荒井

    21世紀(jì)大學(xué)新型參考教材系列 集成電路B 荒井

    標(biāo)簽: 大學(xué) 教材 集成電路

    上傳時間: 2013-04-15

    上傳用戶:eeworm

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