DIGITAL IMAGERY is pervasive in our world today. Consequently, standards for the efficient representation and interchange of digital images are essential. To date, some of the most successful still image compression standards have resulted from the ongoing work of the Joint Photographic Experts Group (JPEG). This group operates under the auspices of Joint Technical Committee 1, Subcommittee 29, Working Group 1 (JTC 1/SC 29/WG 1), a collaborative effort between the International Organization for Standardization (ISO) and International Telecommunication Union Standardization Sector (ITUT). Both the JPEG [1–3] and JPEG-LS [4–6] standards were born from the work of the JPEG committee. For the last few years, the JPEG committee has been working towards the establishment of a new standard known as JPEG 2000 (i.e., ISO/IEC 15444). The fruits of these labors are now coming to bear, as JPEG-2000 Part 1 (i.e., ISO/IEC 15444-1 [7]) has recently been approved as a new international standard.
標(biāo)簽： Consequently efficient pervasive standards
上傳時(shí)間： 2013-12-21
上傳用戶：源弋弋
XCS is a new algorithm for artificial intelligent
標(biāo)簽： intelligent artificial algorithm XCS
上傳時(shí)間： 2013-12-11
上傳用戶：水口鴻勝電器
this is a sample .mainly for the beginner
標(biāo)簽： beginner sample mainly this
上傳時(shí)間： 2015-07-06
上傳用戶：yulg
人工智能中模糊邏輯算法 FuzzyLib 2.0 is a comprehensive C++ Fuzzy Logic library for constructing fuzzy logic systems with multi-controller support. It supports all commonly used shape functions and hedges, with full support for the various types of Aggregation, Correlation, Alphacut, Composition, Defuzzification methods. The latest version of the C++ Fuzzy Logic Class Library contains all the C++ source code and comes complete with a usage example for building a multi-controllers fuzzy logic model.
標(biāo)簽： comprehensive constructing FuzzyLib library
上傳時(shí)間： 2013-12-17
上傳用戶：dbs012280
This application note describes a method for developing block-oriented I/O device drivers for applications that use the DSP/BIOS real-time kernel and includes examples that run with Code Composer Studio v2.1 on the Texas Instruments TMS320C5402 and TMS320C6711 DSP Starter Kits (DSKs). The device driver model presented here has now been superceded with an updated version that supports not only block oriented devices, but also devices such as UARTs, PCI and USB buses and Multimedia cards. Documentation on the updated driver model as well as example drivers and source code can be found in the Device Driver Developer s Kit product now available for download from the TI Developer s Village.
標(biāo)簽： block-oriented application developing describes
上傳時(shí)間： 2015-07-07
上傳用戶：kelimu
This a set of notes I put together for my Computer Architecture class in 1990. Students had a project in which they had to model a microprocessor architecture of their choice. They used these notes to learn VHDL. The notes cover the VHDL-87 version of the language. Not all of the language is covered (about 95％). You may use this booklet for your own personal learning purposes. You may not use it for profit (eg, selling copies of it, using it in a course for which people pay, etc). If you want to make use of it beyond these conditions, contact me and we can come to some arrangement.
標(biāo)簽： Architecture Computer Students together
上傳時(shí)間： 2014-01-15
上傳用戶：wxhwjf
modelsim_se_tutorThis is a set of notes I put together for my Computer Architecture class in 1990. Students had a project in which they had to model a microprocessor architecture of their choice. They used these notes to learn VHDL. The notes cover the VHDL-87 version of the language. Not all of the language is covered (about 95％).
標(biāo)簽： modelsim_se_tutorThis Architecture Computer together
上傳時(shí)間： 2015-07-07
上傳用戶：xfbs821
This is a set of notes I put together for my Computer Architecture class in 1990. Students had a project in which they had to model a microprocessor architecture of their choice. They used these notes to learn VHDL. The notes cover the VHDL-87 version of the language. Not all of the language is covered (about 95％).
標(biāo)簽： Architecture Computer Students together
上傳時(shí)間： 2013-12-26
上傳用戶：kelimu
This build is for developing a "binary-to-BCD" converter for use in // displaying numerals in base-10 so that people can read and interpret the // numbers more readily than they could if the numbers were displayed in // binary or hexadecimal format. Also, a "BCD-to-binary" converter is // tested in this build.
標(biāo)簽： binary-to-BCD developing displaying for
上傳時(shí)間： 2015-07-07
上傳用戶：lmeeworm
BurchED B5-X300 Spartan2e using XC2S300e device Top level file for 6809 compatible system on a chip Designed with Xilinx XC2S300e Spartan 2+ FPGA. Implemented With BurchED B5-X300 FPGA board, B5-SRAM module, B5-CF module and B5-FPGA-CPU-IO module
標(biāo)簽： compatible 300 Spartan2e BurchED
上傳時(shí)間： 2015-07-07
上傳用戶：star_in_rain
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