The implementation of estimation and correction of carrier frequency offset of COFDM system in DAB receiver IC ASIC03
標(biāo)簽： implementation estimation correction frequency
上傳時(shí)間： 2013-12-24
上傳用戶：變形金剛
In this letter, the error performance of an ultra-wideband (UWB) system with a hybrid pulse amplitude and position modulation (PAPM) scheme over indoor lognormal fading channels is analyzed. In the PAPM UWB system, input data is modulated onto both the pulse amplitudes and pulse positions.
標(biāo)簽： ultra-wideband performance amplitud letter
上傳時(shí)間： 2014-01-08
上傳用戶：yulg
YAFFS (Yet Another Flash File System) is now in its second generation and provides a fast robust file system for NAND and NOR Flash.
標(biāo)簽： generation provides Another System
上傳時(shí)間： 2016-04-24
上傳用戶：小鵬
關(guān)于MSK的英文資料 Bit Error Performance Analysis of FH/MSK System in Different Multi-tone Noise Jamming
標(biāo)簽： Performance Multi-tone MSK Different
上傳時(shí)間： 2016-05-07
上傳用戶：liuchee
FreeTTS is a speech synthesis system written entirely in the Java programming language. It is based upon Flite, a small, fast, run-time speech synthesis engine, which in turn is based upon University of Edinburgh s Festival Speech Synthesis System and Carnegie Mellon University s FestVox project.
標(biāo)簽： programming synthesis entirely language
上傳時(shí)間： 2014-08-29
上傳用戶：cylnpy
How to construct embedded linux System in Chinese 嵌入式 如何構(gòu)造嵌入式Linux系統(tǒng)
標(biāo)簽： construct embedded Chinese System
上傳時(shí)間： 2014-11-08
上傳用戶：杜瑩12345
a sample debugger in Linux
標(biāo)簽： debugger sample Linux in
上傳時(shí)間： 2016-06-13
上傳用戶：royzhangsz
USB system architecture specification in chinese
標(biāo)簽： specification architecture chinese system
上傳時(shí)間： 2013-12-12
上傳用戶：huannan88
This m file models a DPSK UWB system using a delay in one leg of the mixer, correlation receiver low pass filter combination requiring no template for synching. Various waveforms are displayed throughout the system to allow the user to observe operation of the system.
標(biāo)簽： correlation receiver models system
上傳時(shí)間： 2013-12-25
上傳用戶：yyyyyyyyyy
Using Verilog-A in Advanced Design System，英文版的關(guān)于Verilog_A的相關(guān)介紹。
標(biāo)簽： Verilog-A Advanced Design System
上傳時(shí)間： 2014-01-07
上傳用戶：tb_6877751
蟲蟲下載站版權(quán)所有 京ICP備2021023401號(hào)-1
