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  • DTMF的原理和算法公式

    ·詳細說明:本文章說明一個可以快速識別和產生DTMF的DSP算法原理!里面詳細說明了DTMF的原理和算法公式- This article explained may fast distinguish and Have the DTMF DSP algorithm principle! Inside specify DTMF principle and algorithm formula

    標簽: DTMF 算法

    上傳時間: 2013-04-24

    上傳用戶:lw852826

  • Many CAD users dismiss schematic capture as a necessary evil in the process of creating

    Many CAD users dismiss schematic capture as a necessary evil in the process of creating\r\nPCB layout but we Have always disputed this point of view. With PCB layout now offering\r\nautomation of both component placement and track routing, getting the des

    標簽: schematic necessary creating dismiss

    上傳時間: 2013-09-25

    上傳用戶:baiom

  • Verilog Coding Style for Efficient Digital Design

      In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All theseproblems are accompanied by an example to Have a better idea, and these can be taken care off if thesecoding guidelines are followed. Discussion of all the techniques is beyond the scope of this paper, however,here we try to cover a few of them.

    標簽: Efficient Verilog Digital Coding

    上傳時間: 2013-11-22

    上傳用戶:han_zh

  • US Navy VHDL Modelling Guide

      This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL modelswhich are compliant with the VHDL Data Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels Have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP models are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.

    標簽: Modelling Guide Navy VHDL

    上傳時間: 2014-12-23

    上傳用戶:xinhaoshan2016

  • 模擬IC性能的權衡 模擬到數字化設計的挑戰

    Abstract: Many digital devices incorporate analog circuits. For instance, microprocessors, applicationspecificintegrated circuits (ASICs), and field-programmable gate arrays (FPGAs) may Have internalvoltage references, analog-to-digital converters (ADCs) or digital-to-analog converters (DACs). However,there are challenges when you integrate more analog onto a digital design. As with all things in life, inelectronics we must always trade one parameter for another, with the application dictating the propertrade-off of analog function. In this application note, we examine how the demand for economy of spaceand cost pushes analog circuits onto digital substrates, and what design challenges emerge.  

    標簽: 模擬IC 性能 模擬 數字化設計

    上傳時間: 2013-11-17

    上傳用戶:菁菁聆聽

  • 正確的混合信號設計印刷電路板(PCB)的接地

    Abstract: This tutorial discusses proper printed-circuit board (PCB) grounding for mixed-signal designs. Formost applications a simple method without cuts in the ground plane allows for successful PCB layouts withthis kind of IC. We begin this document with the basics: where the current flows. Later, we describe how toplace components and route signal traces to minimize problems with crosstalk. Finally, we move on toconsider power supply-currents and end by discussing how to extend what we Have learned to circuits withmultiple mixed-signal ICs.

    標簽: PCB 印刷電路板 混合信號

    上傳時間: 2013-11-04

    上傳用戶:pol123

  • MAX17600數據資料

     The MAX17600–MAX17605 devices are high-speedMOSFET drivers capable of sinking /sourcing 4A peakcurrents. The devices Have various inverting and noninvertingpart options that provide greater flexibility incontrolling the MOSFET. The devices Have internal logiccircuitry that prevents shoot-through during output-statchanges. The logic inputs are protected against voltagespikes up to +14V, regardless of VDD voltage. Propagationdelay time is minimized and matched between the dualchannels. The devices Have very fast switching time,combined with short propagation delays (12ns typ),making them ideal for high-frequency circuits. Thedevices operate from a +4V to +14V single powersupply and typically consume 1mA of supply current.The MAX17600/MAX17601 Have standard TTLinput logic levels, while the MAX17603 /MAX17604/MAX17605 Have CMOS-like high-noise margin (HNM)input logic levels. The MAX17600/MAX17603 are dualinverting input drivers, the MAX17601/MAX17604 aredual noninverting input drivers, and the MAX17602 /MAX17605 devices Have one noninverting and oneinverting input. These devices are provided with enablepins (ENA, ENB) for better control of driver operation.

    標簽: 17600 MAX 數據資料

    上傳時間: 2013-12-20

    上傳用戶:zhangxin

  • 雙絞線和低通濾波器降低EMI_RFI

    Abstract: Alexander Graham Bell patented twisted pair wires in 1881. We still use them today because they work so well. In addition we Have the advantage ofincredible computer power within our world. Circuit simulators and filter design programs are available for little or no cost. We combine the twisted pair and lowpassfilters to produce spectacular rejection of radio frequency interference (RFI) and electromagnetic interference (EMI). We also illustrate use of a precision resistorarray to produce a customizable differential amplifier. The precision resistors set the gain and common mode rejection ratios, while we choose the frequencyresponse.

    標簽: EMI_RFI 雙絞線 低通濾波器

    上傳時間: 2014-11-26

    上傳用戶:Vici

  • 如何提高模冪運算速度應用筆記

    Abstract: This application note describes how to improve the speed of modular exponentiation by more than 50% whenusing MAXQ® microcontrollers that Have a modular arithmetic accelerator (MAA).  

    標簽: 如何提高 模冪運算 應用筆記 速度

    上傳時間: 2013-11-17

    上傳用戶:s363994250

  • 遠程信息處理數字融合--如何應對新興標準和協議

    Digital convergence, in recent history, has been prevalentin the consumer equipment domain and the designengineers in this area Have been struggling with a plethoraof emerging standards and protocols. What lessons can welearn from their struggle? The same dilemmas now existin in-vehicle telematics and infotainment systems but withthe added issues of extremes of temperature, safety,security, and time in market.

    標簽: 遠程信息處理 數字 協議 標準

    上傳時間: 2014-12-23

    上傳用戶:9牛10

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