This document provides guidelines for integrating a discrete HIgh speed USB host controller onto a fourlayer desktop motherboard. The material covered can be broken into three main categories: Board design guidelines, EMI/ESD guidelines and front panel USB guidelines. Section 1.1 Background provides an explanation of the routing experiments and testing performed to validate the feasibility of 480 Megabits per second on an actual motherboard. Section 7 contains a design checklist that lists each design recommendation described in this document. HIgh speed USB operation is described in the USB 2.0 Specification (http://www.usb.org/developers/docs.html).
標(biāo)簽： integrating controller guidelines document
上傳時(shí)間： 2013-11-27
上傳用戶：電子世界
This document provides guidelines for integrating a discrete HIgh speed USB host controller onto a fourlayer desktop motherboard. The material covered can be broken into three main categories: Board design guidelines, EMI/ESD guidelines and front panel USB guidelines. Section 1.1 Background provides an explanation of the routing experiments and testing performed to validate the feasibility of 480 Megabits per second on an actual motherboard. Section 7 contains a design checklist that lists each design recommendation described in this document. HIgh speed USB operation is described in the USB 2.0 Specification (http://www.usb.org/developers/docs.html).
標(biāo)簽： integrating controller guidelines document
上傳時(shí)間： 2015-11-18
上傳用戶：xhz1993
The ability to write efficient, HIgh-speed arithmetic routines ultimately depends upon your knowledge of the elements of arithmetic as they exist on a computer. That conclusion and this book are the result of a long and frustrating search for information on writing arithmetic routines for real-time embedded systems. With instruction cycle times coming down and clock rates going up, it would seem that speed is not a problem in writing fast routines. In addition, math coprocessors are becoming more popular and less expensive than ever before and are readily available. These factors make arithmetic easier and faster to use and implement. However, for many of you the systems that you are working on do not include the latest chips or the faster processors. Some of the most widely used microcontrollers used today are not Digital Signal Processors (DSP), but simple eight-bit controllers such as the Intel 8051 or 8048 microprocessors.
標(biāo)簽： arithmetic HIgh-speed ultimately efficient
上傳時(shí)間： 2014-11-30
上傳用戶：lizhen9880
X264: A HIgh PERFORMANCE H.264/AVC ENCODER 詳細(xì)介紹了x264采用的技術(shù)細(xì)節(jié)，對(duì)理解x264源碼大有好處。
標(biāo)簽： PERFORMANCE ENCODER X264 HIgh
上傳時(shí)間： 2013-12-13
上傳用戶：jackgao
一種基于FPGA的設(shè)計(jì)實(shí)時(shí)高分辨率圖像處理系統(tǒng)的設(shè)計(jì)方法。英文為Real-Time System for HIgh-Image Resolution Disparity Estimation。主要講算法和系統(tǒng)構(gòu)架
標(biāo)簽： Estimation HIgh-Image Resolution Disparity
上傳時(shí)間： 2014-01-07
上傳用戶：lacsx
Electronic and quantum devices of the MICROWAVE (the HIgh signal of frequency)
標(biāo)簽： Electronic MICROWAVE frequency the
上傳時(shí)間： 2014-01-02
上傳用戶：電子世界
Java Power Player, our slogan is "Download once, reproduce everywhere". Java Power Player is an HIgh-performances player written with 100％ pure-Java source code. No native libraries. Download Now!
標(biāo)簽： Player Power Java everywhere
上傳時(shí)間： 2014-01-20
上傳用戶：l254587896
VHDL（Very HIgh Speed Integrated Circuit Hardware Description Language）硬件描述語言設(shè)計(jì)規(guī)范講解
標(biāo)簽： Description Integrated Hardware Language
上傳時(shí)間： 2014-01-18
上傳用戶：dyctj
利用子帶結(jié)構(gòu)壓縮和擴(kuò)展高速動(dòng)態(tài)深度圖像----Compressing and Companding HIgh Dynamic Range Images with Subband Architectures
標(biāo)簽： Compressing Companding Architectu Dynamic
上傳時(shí)間： 2015-12-22
上傳用戶：zhaoq123
VHDL（Very-HIgh-Speed Integrated Circuit Hardware Description）
標(biāo)簽： Very-HIgh-Speed Description Integrated Hardware
上傳時(shí)間： 2015-12-30
上傳用戶：lht618
蟲蟲下載站版權(quán)所有 京ICP備2021023401號(hào)-1
