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HDCP_Specification-Rev

  • EVDO基本原理和關鍵技術

      §培訓目標:   本課程主要對EVDO的基本原理和關鍵技術進行介紹。通過本課程的學習,可以了解EVDO Rev.0和Rev.A的空中接口和關鍵技術,以及1X/DO互操作的相關規(guī)則等。   §培訓內(nèi)容:   EVDO技術發(fā)展、網(wǎng)絡結構簡介;   EVDO Rev.0和RevA的空中接口結構;   EVDO Rev.0和RevA的關鍵技術;   1X / DO互操作原則;

    標簽: EVDO 關鍵技術

    上傳時間: 2014-03-25

    上傳用戶:d815185728

  • XAPP740利用AXI互聯(lián)設計高性能視頻系統(tǒng)

    This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX  and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board

    標簽: XAPP 740 AXI 互聯(lián)

    上傳時間: 2013-11-23

    上傳用戶:shen_dafa

  • mp3設計程序資料

    mp3設計程序資料,采用c語言編寫。 README file for yampp-3 source code 2001-05-27 This is the current state of the yampp-3 source code, 2001-05-27. This code is intended to run on Rev. B of the yampp-3 PCB, but can ofcourse be used on compatible systems as well. It still uses the "old" song selection system as the yampp-2. However, the disk handling routines has improved a lot and the obviosly, the new VS1001 handling has been put in. The codesize is almost at it s maximum at 1F40 bytes. A .ROM file is included if you don t have the compiler set up. For now, the documentation is in the code

    標簽: mp3 設計程序

    上傳時間: 2015-04-13

    上傳用戶:小碼農(nóng)lz

  • 假近鄰法(False Nearest Neighbor, FNN)計算嵌入維的Matlab程序 文件夾說明: Main_FNN.m - 程序主函數(shù)

    假近鄰法(False Nearest Neighbor, FNN)計算嵌入維的Matlab程序 文件夾說明: Main_FNN.m - 程序主函數(shù),直接運行此文件即可 LorenzData.dll - 產(chǎn)生Lorenz時間序列 PhaSpaRecon.m - 相空間重構 fnn_luzhenbo.dll - 假近鄰計算主函數(shù) SearchNN.dll - 近鄰點搜索 buffer_SearchNN_1.dll - 近鄰點搜索緩存1 buffer_SearchNN_2.dll - 近鄰點搜索緩存2 參考文獻: M.B.Kennel, R.Brown, H.D.I.Abarbanel. Determining embedding dimension for phase-space reconstruction using a geometrical construction[J]. Phys. Rev. A 1992,45:3403.

    標簽: Main_FNN Neighbor Nearest Matlab

    上傳時間: 2013-12-10

    上傳用戶:songnanhua

  • cpress usb 芯片Vender 處理固件。 The purpose of this software is to demonstrate how to implement vendor s

    cpress usb 芯片Vender 處理固件。 The purpose of this software is to demonstrate how to implement vendor specific commands. The following vendor specific commands are implemented: A0 Firmware Upload/Download A2 EEProm Load A3 External Ram Load A4 Set I2C Addr A5 Get IIC Type (1 Byte or 2 Byte EEPROM) A6 Get Chip Rev A8 Renumerate

    標簽: demonstrate implement software purpose

    上傳時間: 2016-01-14

    上傳用戶:stvnash

  • CF VHDL The CF+ design was designed using the timing diagrams of the Compact Flash specification re

    CF VHDL The CF+ design was designed using the timing diagrams of the Compact Flash specification rev. 1.4, Analog Devices ADSP-218xN DSP Microcomputer specification, and the Intel StrataFlash Memory 28F320J3 specification.

    標簽: specification the designed diagrams

    上傳時間: 2013-12-27

    上傳用戶:yyyyyyyyyy

  • EPSON的S1D13A05芯片在VxWorks下的WindML顯示驅動源碼以及使用說明。S1D13A05是一款使用的非常多的LCD控制及USB協(xié)議芯片。 1、S1D13A05_WindML_v2.

    EPSON的S1D13A05芯片在VxWorks下的WindML顯示驅動源碼以及使用說明。S1D13A05是一款使用的非常多的LCD控制及USB協(xié)議芯片。 1、S1D13A05_WindML_v2.0_Display_Driver是WindML源代碼 2、x40ae003 (S1D13A05 WindML v2.0 Display Driver User Manual Rev 1.0)是WindML源碼的說明文檔

    標簽: S1D13A05 WindML_v VxWorks WindML

    上傳時間: 2014-01-26

    上傳用戶:jcljkh

  • BlackBerry Hacks will enhance your mobile computing with great tips and tricks. You ll learn that th

    BlackBerry Hacks will enhance your mobile computing with great tips and tricks. You ll learn that the BlackBerry is capable of things you never thought possible, and you ll learn how to make it an even better email and web workhorse: Get the most out of the built-in applications Take control of email with filters, searches, and more Rev up your mobile gaming--whether you re an arcade addict or poker pro Browse the web, chat over IM, and keep up with news and weblogs Work with office documents, spell check your messages, and send faxes Become more secure, lock down your BlackBerry and stash secure information somewhere safe Manage and monitor the BlackBerry Enterprise Server (BES) and Mobile Data System (MDS) Create web sites that look great on a BlackBerry Develop and deploy BlackBerry applications

    標簽: BlackBerry computing enhance mobile

    上傳時間: 2016-12-07

    上傳用戶:GavinNeko

  • 有關RTL8201CP網(wǎng)絡芯片 嵌入式設計的開發(fā)文檔 SINGLE-CHIP/SINGLE-PORT 10/100M FAST ETHERNET PHYCEIVER (With Auto C

    有關RTL8201CP網(wǎng)絡芯片 嵌入式設計的開發(fā)文檔 SINGLE-CHIP/SINGLE-PORT 10/100M FAST ETHERNET PHYCEIVER (With Auto Crossover) DATASHEET Rev. 1.21 12 October 2004 Track ID: JATR-1076-21

    標簽: SINGLE-CHIP SINGLE-PORT PHYCEIVER ETHERNET

    上傳時間: 2017-01-05

    上傳用戶:libinxny

  • SEED-DTK5502 實驗手冊(Rev. C)

    本實驗手冊包含實驗環(huán)境的構建和實驗箱例程介紹等內(nèi)容。在第一章中介紹實驗箱的結 構,特點等內(nèi)容;第二章中介紹DSP 調(diào)試工具的安裝與使用;第三章對實驗例程進行介紹, 分為實驗原理,實驗目的,以及實驗程序的結構和調(diào)試方法等;第四章則分別各模板上 FLASH 的燒寫方法。最后附錄部分提供了實驗箱的硬件資源,供師生查閱。

    標簽: SEED-DTK5502 實驗手冊(Rev. C)SEED 是北京合眾達電子技術有限責任公司

    上傳時間: 2015-05-22

    上傳用戶:豬豬組a

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