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GNSS-measurement

  • GNSS軟件接收機(jī)關(guān)鍵技術(shù)研究及實(shí)現(xiàn)

    該文檔為GNSS軟件接收機(jī)關(guān)鍵技術(shù)研究及實(shí)現(xiàn)講解文檔,是一份很不錯(cuò)的參考資料,具有較高參考價(jià)值,感興趣的可以下載看看………………

    標(biāo)簽: gnss

    上傳時(shí)間: 2022-03-06

    上傳用戶:

  • SKYLAB無(wú)線模塊GNSS/WiFi/藍(lán)牙模塊應(yīng)用解決方案

    SKYLAB無(wú)線模塊GNSS/WiFi/藍(lán)牙模塊應(yīng)用解決方案

    標(biāo)簽: 無(wú)線模塊 GNSS WiFi 藍(lán)牙模塊

    上傳時(shí)間: 2022-07-05

    上傳用戶:

  • 基于FPGA利用FFT算法實(shí)現(xiàn)GPSCA碼捕獲的研究.rar

    隨著中國(guó)二代導(dǎo)航系統(tǒng)的建設(shè),衛(wèi)星導(dǎo)航的應(yīng)用將普及到各個(gè)行業(yè),具有自主知識(shí)產(chǎn)權(quán)的衛(wèi)星導(dǎo)航接收機(jī)的研究與設(shè)計(jì)是該領(lǐng)域的一個(gè)研究熱點(diǎn)。在接收機(jī)的設(shè)計(jì)中,對(duì)于成熟技術(shù)將利用ASIC芯片進(jìn)行批量生產(chǎn),該芯片是專用芯片,一旦制造成型不能改變。但是對(duì)于正在研究的接收機(jī)技術(shù),特別是在需要利用接收機(jī)平臺(tái)進(jìn)行提高接收機(jī)性能研究時(shí),利用FPGA通用可編程門陣列芯片是非常方便的。在FPGA上的研究成果,一旦成熟可以很方便的移植到ASIC芯片,進(jìn)行批量生產(chǎn)。本課題就是基于FPGA研究GPS并行捕獲技術(shù)的硬件電路,著重進(jìn)行了其中一個(gè)捕獲通道的設(shè)計(jì)和實(shí)現(xiàn)。 GPS信號(hào)捕獲時(shí)間是影響GPS接收機(jī)性能的一個(gè)關(guān)鍵因素,尤其是在高動(dòng)態(tài)和實(shí)時(shí)性要求高的應(yīng)用中或者對(duì)弱GPS信號(hào)的捕獲方面。因此,本文在滑動(dòng)相關(guān)法基礎(chǔ)上引出了基于FFT的并行快速捕獲方法,采用自頂向下的方法對(duì)系統(tǒng)進(jìn)行總體功能劃分和結(jié)構(gòu)設(shè)計(jì),并采用自底向上的方法對(duì)系統(tǒng)進(jìn)行功能實(shí)現(xiàn)和驗(yàn)證。 本課題以Xilinx公司的Spartan3E開發(fā)板為硬件開發(fā)平臺(tái),以ISE9.2i為軟件開發(fā)平臺(tái),采用Verilog HDL編程實(shí)現(xiàn)該系統(tǒng)。并利用Nemerix公司的GPS射頻芯片NJ1006A設(shè)計(jì)制作了GPS中頻信號(hào)產(chǎn)生平臺(tái)。該平臺(tái)可實(shí)時(shí)地輸出采樣頻率為16.367MHz的GPS數(shù)字中頻信號(hào)。 本課題主要是基于采樣率變換和FFT實(shí)現(xiàn)對(duì)GPS C/A碼的捕獲。該算法利用平均采樣的方法,將信號(hào)的采樣率降低到1.024 MHz,在低采樣率下利用成熟的1024點(diǎn)FFT IP核對(duì)C/A碼進(jìn)行粗捕,給出GPS信號(hào)的碼相位(精度大約為1/4碼片)和載波的多普勒頻率,符合GPS后續(xù)跟蹤的要求。 同時(shí),由于FFT算法是以資源換取時(shí)間的方法來(lái)提高GPS捕獲速度的,所以在設(shè)計(jì)時(shí),合理地采用FPGA設(shè)計(jì)思想與技巧優(yōu)化系統(tǒng)。基于實(shí)用性的要求,詳細(xì)的給出了基于FFT的GPS并行捕獲各個(gè)模塊的實(shí)現(xiàn)原理、實(shí)現(xiàn)結(jié)構(gòu)以及仿真結(jié)果。并達(dá)到降低系統(tǒng)硬件資源,能夠快速、高效地實(shí)現(xiàn)對(duì)GPS C/A碼捕獲的要求。 本研究是導(dǎo)航研究所承擔(dān)的國(guó)家863課題“利用多徑信號(hào)提高GNSS接收機(jī)性能的新技術(shù)研究”中關(guān)于接收機(jī)信號(hào)捕獲算法的一部分,對(duì)接收機(jī)的設(shè)計(jì)具有一定的參考價(jià)值。

    標(biāo)簽: GPSCA FPGA FFT

    上傳時(shí)間: 2013-07-22

    上傳用戶:user08x

  • 基于ARMGNSS的分布式NTP精確授時(shí)服務(wù)器設(shè)計(jì)與應(yīng)用

    隨著現(xiàn)代信息系統(tǒng)發(fā)展,網(wǎng)絡(luò)系統(tǒng)尤其是分布式系統(tǒng)日益廣泛地用于各個(gè)行業(yè)和領(lǐng)域,其中很多的關(guān)鍵應(yīng)用需要基于時(shí)間同步進(jìn)行。傳統(tǒng)采用精準(zhǔn)時(shí)鐘對(duì)設(shè)備物理時(shí)鐘進(jìn)行精準(zhǔn)調(diào)節(jié)以達(dá)到時(shí)鐘同步的方式,以及單純的在局域網(wǎng)內(nèi)部通過相關(guān)時(shí)間協(xié)議進(jìn)行時(shí)間同步的方式,由于受諸多限制,不能很好地解決分布式精確時(shí)鐘同步的問題。然而人們對(duì)分布式時(shí)間精準(zhǔn)度和時(shí)間同步的精確度要求越來(lái)越高,新型分布式網(wǎng)絡(luò)時(shí)間同步研究成為一個(gè)需要亟待解決的關(guān)鍵性問題。既有工程應(yīng)用價(jià)值,也有一定的理論意義。 首先從分布式系統(tǒng)應(yīng)用的角度出發(fā),首先對(duì)GNSS衛(wèi)星授時(shí)、NTP協(xié)議、嵌入式系統(tǒng)及uClinux操作系統(tǒng)等理論和技術(shù)進(jìn)行了闡述。重點(diǎn)討論了如何解決分布式系統(tǒng)中的精確授時(shí)與同步問題的必要性和工程意義,分析了GNSS衛(wèi)星授時(shí)特點(diǎn)和NTP網(wǎng)絡(luò)協(xié)議的機(jī)制。 其次在充分考慮到網(wǎng)絡(luò)同步實(shí)時(shí)性要求高的特點(diǎn)的基礎(chǔ)上,提出了一種基于GNSS的嵌入式NTP授時(shí)服務(wù)器的設(shè)計(jì)架構(gòu),對(duì)各主要模塊的功能、結(jié)構(gòu)和工作原理進(jìn)行了功能和性能分析。硬件具體以32位ARMS3C44B0X作為硬件控制核心的微處理器,開發(fā)了具有多通信端口的應(yīng)用電路主板,并集成了GNSS衛(wèi)星通信模塊。 再次在軟件方面具體對(duì)uClinux操作系統(tǒng)底層接口進(jìn)行了較為深入的分析,在所設(shè)計(jì)的服務(wù)器硬件平臺(tái)上移植了uClinux嵌入式操作系統(tǒng)及相關(guān)的驅(qū)動(dòng)程序,并采用模塊化的設(shè)計(jì)思想進(jìn)行了NTP應(yīng)用程序的設(shè)計(jì)與集成,實(shí)現(xiàn)了NTP協(xié)議的編譯和NTP授時(shí)服務(wù),其中對(duì)NTP協(xié)議主要參數(shù)和具體工作過程進(jìn)行了系統(tǒng)性分析和設(shè)置應(yīng)用。 最后在獲取精準(zhǔn)的系統(tǒng)統(tǒng)一時(shí)鐘、通過NTP協(xié)議提供授時(shí)服務(wù)的基礎(chǔ)上,結(jié)合實(shí)際在人工影響天氣通信指揮系統(tǒng)中具體應(yīng)用,實(shí)現(xiàn)了分布式人工降雨火箭彈發(fā)射點(diǎn)按命令精確同步進(jìn)行發(fā)射的應(yīng)用集成。初步測(cè)試表明,本文所設(shè)計(jì)的授時(shí)服務(wù)器應(yīng)用情況良好,實(shí)現(xiàn)了不同層次分布式應(yīng)用對(duì)于時(shí)間精準(zhǔn)同步的高要求。

    標(biāo)簽: ARMGNSS NTP 分布式 服務(wù)器

    上傳時(shí)間: 2013-04-24

    上傳用戶:ouyangtongze

  • ccp

    CAN測(cè)量與標(biāo)定下位機(jī)程序及詳細(xì)文檔。can標(biāo)定C語(yǔ)言實(shí)現(xiàn)-CAN Measurement and Calibration under the crew detailed procedures and

    標(biāo)簽: ccp

    上傳時(shí)間: 2013-05-19

    上傳用戶:hrzx1234

  • 使用傳感器KMZ41和傳感器信號(hào)調(diào)節(jié)芯片UZZ9001,構(gòu)建基于MR天使測(cè)量系統(tǒng)

    Angle measurement is frequently required in both automotive and industrial applications. Contactl

    標(biāo)簽: 9001 KMZ UZZ 傳感器

    上傳時(shí)間: 2013-05-18

    上傳用戶:cuiqiang

  • 簡(jiǎn)化精密測(cè)量的高輸入阻抗ADC

      High input impedance and a wide input range are twohighly desirable features in a precision analog-to-digitalconverter, and the LTC®2449 delta-sigma ADC has both.With just a few external components, the LTC2449 formsan exceptional measurement system with very high inputimpedance and an input range that extends 300mV beyondthe supply rails.

    標(biāo)簽: ADC 精密測(cè)量 高輸入阻抗

    上傳時(shí)間: 2013-11-02

    上傳用戶:ywcftc277

  • 諧振器論文精選.rar

    Control systems are becoming increasingly dependent on digital processing and so require sensors able to provide direct digital inputs. Sensors based on time measurement, having outputs based on a frequency or phase, have an advantage over conventional analogue sensors in that their outputs can be measured directly in digital systems by pulse counting.

    標(biāo)簽: 諧振器 論文

    上傳時(shí)間: 2013-10-08

    上傳用戶:wuyuying

  • ADC轉(zhuǎn)換器技術(shù)用語(yǔ) (A/D Converter Defi

    ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.

    標(biāo)簽: Converter Defi ADC 轉(zhuǎn)換器

    上傳時(shí)間: 2013-11-12

    上傳用戶:pans0ul

  • 高速數(shù)字系統(tǒng)設(shè)計(jì)下載pdf

    高速數(shù)字系統(tǒng)設(shè)計(jì)下載pdf:High-Speed Digital SystemDesign—A Handbook ofInterconnect Theory and DesignPracticesStephen H. HallGarrett W. HallJames A. McCallA Wiley-Interscience Publication JOHN WILEY & SONS, INC.New York • Chichester • Weinheim • Brisbane • Singapore • TorontoCopyright © 2000 by John Wiley & Sons, Inc.speeddigital systems at the platform level. The book walks the reader through everyrequired concept, from basic transmission line theory to digital timing analysis, high-speedmeasurement techniques, as well as many other topics. In doing so, a unique balancebetween theory and practical applications is achieved that will allow the reader not only tounderstand the nature of the problem, but also provide practical guidance to the solution.The level of theoretical understanding is such that the reader will be equipped to see beyondthe immediate practical application and solve problems not contained within these pages.Much of the information in this book has not been needed in past digital designs but isabsolutely necessary today. Most of the information covered here is not covered in standardcollege curricula, at least not in its focus on digital design, which is arguably one of the mostsignificant industries in electrical engineering.The focus of this book is on the design of robust high-volume, high-speed digital productssuch as computer systems, with particular attention paid to computer busses. However, thetheory presented is applicable to any high-speed digital system. All of the techniquescovered in this book have been applied in industry to actual digital products that have beensuccessfully produced and sold in high volume.Practicing engineers and graduate and undergraduate students who have completed basicelectromagnetic or microwave design classes are equipped to fully comprehend the theorypresented in this book. At a practical level, however, basic circuit theory is all thebackground required to apply the formulas in this book.

    標(biāo)簽: 高速數(shù)字 系統(tǒng)設(shè)計(jì)

    上傳時(shí)間: 2013-10-26

    上傳用戶:縹緲

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