This GETting started exercise will guide you through the step-by-step process of transforming a MATLAB floating-point model into a hardware module that can be implemented in silicon (FPGA or ASIC). The design is a general purpose FIR filter taken from the AccelDSP Examples directory.
標(biāo)簽：
step-by-step
transforming
exercise
GETting
上傳時(shí)間：
2014-01-17
上傳用戶(hù)：VRMMO
