為解決傳統可視倒車雷達視頻字符疊加器結構復雜，可靠性差，成本高昂等問題，在可視倒車雷達設計中采用視頻字符發生器芯片MAX7456。該芯片集成了所有用于產生用戶定義OSD，并將其插入視頻信號中所需的全部功能，僅需少量的外圍阻容元件即可正常工作。給出了以MAX7456為核心的可視倒車雷達的軟、硬件實現方案及設計實例。該方案具有電路結構簡單、價格低廉、符合人體視覺習慣的特點。經實際裝車測試，按該方案設計的可視倒車雷達視場清晰、提示字符醒目、工作可靠，可有效降低駕駛員倒車時的工作強度、減少倒車事故的發生。 Abstract: A new video and text generation chip，MAX7456，was used in the design of video parking sensor in order to simplify system structure，improve reliability and reduce cost. This chip included all the necessary functions to generate user-defined OSDs and to add them into the video signals. It could be put into work with addition of just a small number of resistances and capacitors. This paper provided software and hardware implementation solutions and design example based on the chip. The system had the characteristics of simplicity in circuit structure，lower cost，and comfort for the nature of human vision. Loading road test demonstrates high video and text display quality and reliable performance，which makes the driver easy to see backward and reduces chance of accidents.
上傳時間： 2013-12-10
上傳用戶：qiaoyue
1 FEATURES· Single chip LCD controller/driver· 1 or 2-line display of up to 24 characters per line, or2 or 4 lines of up to 12 characters per line· 5 ′ 7 character format plus cursor; 5 ′ 8 for kana(Japanese syllabary) and user defined symbols· On-chip:– generation of LCD supply voltage (external supplyalso possible)– generation of intermediate LCD bias voltages– oscillator requires no external components (externalclock also possible)· Display data RAM: 80 characters· Character generator ROM: 240 characters· Character generator RAM: 16 characters· 4 or 8-bit parallel bus or 2-wire I2C-bus interface· CMOS/TTL compatible· 32 row, 60 column outputs· MUX rates 1 : 32 and 1 : 16· Uses common 11 code instruction set· Logic supply voltage range, VDD - VSS: 2.5 to 6 V· Display supply voltage range, VDD - VLCD: 3.5 to 9 V· Low power consumption· I2C-bus address: 011101 SA0.
上傳時間： 2013-11-08
上傳用戶：laozhanshi111
Bootloader是微處理器上電時運行的第一段代碼，它可以通過通信接口實現對微處理器內部應用程序的更新升級，為網絡化嵌入式產品的應用程序升級帶來極大的便利。由于目前沒有統一嵌入式系統的Bootloader。基于NEC 78K0系列單片機自編程原理，設計出一個適用于78K0/Fx2系列單片機的Bootloader，并能夠通過單片機串口在線升級應用程序。 Abstract: Bootloader is the first piece of code executed after microprocessor startup. It makes the embedded product’s firmware update conveniently through communication interface. However， no unified bootloader is available for all kinds of microprocessor products. Based on the principle of self-programming NEC 78K0s’ series， a useful Bootloader which is suitable for 78K0/Fx2s’ series MCU is designed，the design can update the application through serial ports.
標簽： Bootloader MCU 自編程
上傳時間： 2013-10-26
上傳用戶：fang2010
The LPC1769/68/67/66/65/64 are ARM Cortex-M3 based microcontrollers for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration.
上傳時間： 2014-02-20
上傳用戶：13215175592
Internal Interrupts are used to respond to asynchronous requests from a certain part of themicrocontroller that needs to be serviced. Each peripheral in the TriCore as well as theBus Control Unit, the Debug Unit, the Peripheral Control Processor (PCP) and the CPUitself can generate an Interrupt Request.So what is an external Interrupt?An external Interrupt is something alike as the internal Interrupt. The difference is that anexternal Interrupt request is caused by an external event. Normally this would be a pulseon Port0 or Port1, but it can be even a signal from the input buffer of the SSC, indicatingthat a service is requested.The User’s Manual does not explain this aspect in detail so this ApNote will explain themost common form of an external Interrupt request. This ApNote will show that there is aneasy way to react on a pulse on Port0 or Port1 and to create with this impulse an InterruptService Request. Later in the second part of the document, you can find hints on how todebounce impulses to enable the use of a simple switch as the input device.Note: You will find additional information on how to setup the Interrupt System in theApNote “First steps through the TriCore Interrupt System” (AP3222xx)1. It would gobeyond the scope of this document to explain this here, but you will find selfexplanatoryexamples later on.
上傳時間： 2013-10-27
上傳用戶：zhangyigenius
The Infineon TriCore provides an Interrupt System with a high safety standard. Thisdocument contains some instructions on how to initiate an Interrupt from an externaldevice. First it will show you how to trigger an Interrupt Service Request by an impulseon Port 0 or Port 1. Then in the second part of the document you can find hints how todebounce impulses to enable the use of a simple switch as input device.Authors: Thomas Bliem, CQ Nguyen / Infineon SMI MD Apps
上傳時間： 2013-11-05
上傳用戶：uuuuuuu
摘 要:用一種新的思路和方法,先計算低通、再計算高通濾波器的有關參數,然后組合成帶通濾波器.關鍵詞:濾波器;參數;新思路中圖分類號: TN713. 5 文獻識別碼:B 文章編號:1008 - 1666 (1999) 04 - 0089 - 03A New Consideration of the Band Filter’s CalculationGuo Wencheng( S hao Yang B usiness and Technology school , S haoyang , Hunan ,422000 )Abstract :This essay deals with a new method of calculating the band filters - first calculatingthe relevant parameters of low - pass filters ,then calculating the ones of high - pass filters.Key words :filter ; parameters ;new considercation八十年代后,信息產業得到了迅猛發展. 帶通濾波器在微波通信、廣播電視和精密儀器設備中得到了廣泛應用. 帶通濾波器性能的優劣,對提高接收機信噪比,防止鄰近信道干擾,提高設備的技術指標,有著十分重要的意義.我在長期的教學實踐中,用切比雪夫型方法設計、計算出寬帶濾波器集中參數元件的數據. 該濾波器可運用在檢測微波頻率的儀器和其他設備中. 再將其思路和計算方法介紹給大家,供參考.
上傳時間： 2014-12-28
上傳用戶：Yukiseop
為了擴大監控范圍，提高資源利用率，降低系統成本，提出了一種多通道視頻切換的解決方案。首先從視頻信號分離出行場信號，然后根據行場信號由DSP和FPGA產生控制信號，控制多路視頻通道之間的切換，從而實現讓一個視頻處理器同時監控不同場景。實驗結果表明，該方案可以在視頻監控告警系統中穩定、可靠地實現視頻通道的切換。 Abstract: To expand the scope of monitoring， improve resource utilization， reduce system cost， a multiple video channels signal switching method is pointed out in this paper. First， horizontal sync signal and field sync signal from the video signal are separated， then control signal according to the sync signal by DSP and FPGA is generated to control the switching between multiple video channels. Thus， it achieves to make a video processor to monitor different place. Experimental results show that the method can realize video channel switching reliably， and is applied in the video monitoring warning system successfully.
上傳時間： 2013-11-09
上傳用戶：不懂夜的黑
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽： UltraScale Xilinx 架構
上傳時間： 2013-11-13
上傳用戶：瓦力瓦力hong
This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System
上傳時間： 2013-11-05
上傳用戶：維子哥哥
