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FUNCTIONALITY

  • Digitally+Assisted+Pipeline+ADCs

    The continued reduction of integrated circuit feature sizes and commensurate improvements in device performance are fueling the progress to higher FUNCTIONALITY and new application areas. For example, over the last 15 years, the performance of microprocessors has increased 1000 times. Analog circuit performance has also improved, albeit at a slower pace. For example, over the same period the speed/resolution figure-of-merit of analog-to-digital converters improved by only a factor 10.

    標(biāo)簽: Digitally Assisted Pipeline ADCs

    上傳時(shí)間: 2020-05-27

    上傳用戶:shancjb

  • Introduction to RF Power Amplifier Design

    Radio frequency (RF) power amplifiers are used in everyday life for many applica- tions including cellular phones, magnetic resonance imaging, semiconductor wafer processing for chip manufacturing, etc. Therefore, the design and performance of RF amplifiers carry great importance for the proper FUNCTIONALITY of these devices. Furthermore, several industrial and military applications require low-profile yet high-powered and efficient power amplifiers. 

    標(biāo)簽: Introduction Amplifier Design Power to RF

    上傳時(shí)間: 2020-05-27

    上傳用戶:shancjb

  • Software+Radio

    Software Radio (SR) is one of the most important emerging technologies for the future of wireless communication services. By moving radio FUNCTIONALITY into software, it promises to give flexible radio systems that are multi-service, multi- standard, multi-band, reconfigurable and reprogrammable by software. Today’s radios are matched to a particular class of signals that are well defined bytheircarrierfrequencies,modulationformatsandbandwidths.Aradiotransmitter today can only up convert signals with well-defined bandwidths over defined center frequencies, while, on the other side of the communication chain, a radio receiver can only down convert well-defined signal bandwidths, transmitted over specified carrier frequencies.

    標(biāo)簽: Software Radio

    上傳時(shí)間: 2020-06-01

    上傳用戶:shancjb

  • Thermal+Management+of+Telecommunications+Equipment

    The need to develop reliable microelectronic devices capable of operating at high speeds with complex FUNCTIONALITY requires a better understanding of the factors that govern the thermal performance of electronics. With an increased demand on system reliability and performance combined with miniaturization of the devices, thermal consideration has become a crucial factor in the design of elec- tronic packages, from chip to system levels.

    標(biāo)簽: Telecommunications Management Equipment Thermal of

    上傳時(shí)間: 2020-06-01

    上傳用戶:shancjb

  • Basic ESD Design Guidelines

    ESD is a crucial factor for integrated circuits and influences their quality and reliability. Today increasingly sensitive processes with deep sub micron structures are developed. The integration of more and more FUNCTIONALITY on a single chip and saving of chip area is required. Integrated circuits become more susceptible to ESD/EOS related damages. However, the requirements on ESD robustness especially for automotive applications are increasing. ESD failures are very often the reason for redesigns. Much research has been conducted by semiconductor manufacturers on ESD robust design.

    標(biāo)簽: Guidelines Design Basic ESD

    上傳時(shí)間: 2020-06-05

    上傳用戶:shancjb

  • Wireless Identification

    We are in the era of ubiquitous computing in which the use and development of Radio Frequency Iden- tification (RFID) is becoming more widespread. RFID systems have three main components: readers, tags, and database. An RFID tag is composed of a small microchip, limited logical FUNCTIONALITY, and an antenna. Most common tags are passive and harvest energy from a nearby RFID reader. This energy is used both to energize the chip and send the answer back to the reader request. The tag provides a unique identifier (or an anonymized version of that), which allows the unequivocal identification of the tag holder (i.e. person, animal, or items).

    標(biāo)簽: Identification Wireless

    上傳時(shí)間: 2020-06-08

    上傳用戶:shancjb

  • MiniCore

    An Arduino core for the ATmega328, ATmega168, ATmega88, ATmega48 and ATmega8, all running a [custom version of Optiboot for increased FUNCTIONALITY](#write-to-own-flash). This core requires at least Arduino IDE v1.6.2, where v1.8.5+ is recommended. <br/> **This core gives you two extra IO pins if you're using the internal oscillator!** PB6 and PB7 is mapped to [Arduino pin 20 and 21](#pinout).<br/> If you're into "generic" AVR programming, I'm happy to tell you that all relevant keywords are being highlighted by the IDE through a separate keywords file. Make sure to test the [example files](https://github.com/MCUdude/MiniCore/tree/master/avr/libraries/AVR_examples/examples) (File > Examples > AVR C code examples). Try writing a register name, <i>DDRB</i> for instance, and see for yourself!

    標(biāo)簽: MiniCore

    上傳時(shí)間: 2021-02-22

    上傳用戶:

  • DDR4標(biāo)準(zhǔn) JESD79_4

    1. Scope ......................................................................................................................................................................... 12. DDR4 SDRAM Package Pinout and Addressing ....................................................................................................... 22.1 DDR4 SDRAM Row for X4,X8 and X16 ................................................................................................................22.2 DDR4 SDRAM Ball Pitch........................................................................................................................................22.3 DDR4 SDRAM Columns for X4,X8 and X16 ..........................................................................................................22.4 DDR4 SDRAM X4/8 Ballout using MO-207......................................................................................................... 22.5 DDR4 SDRAM X16 Ballout using MO-207.............................................................................................................32.6 Pinout Description ..................................................................................................................................................52.7 DDR4 SDRAM Addressing.....................................................................................................................................73. Functional Description ...............................................................................................................................................83.1 Simplified State Diagram ....................................................................................................................................83.2 Basic FUNCTIONALITY..................................................................................................................................................93.3 RESET and Initialization Procedure .....................................................................................................................103.3.1 Power-up Initialization Sequence .............................................................................................................103.3.2 Reset Initialization with Stable Power ......................................................................................................113.4 Register Definition ................................................................................................................................................123.4.1 Programming the mode registers .............................................................................................................123.5 Mode Register ......................................................................................................................................................134. DDR4 SDRAM Command Description and Operation ............................................................................................. 244.1 Command Truth Table ..........................................................................................................................................244.2 CKE Truth Table ...................................................................................................................................................254.3 Burst Length, Type and Order ..............................................................................................................................264.3.1 BL8 Burst order with CRC Enabled .........................................................................................................264.4 DLL-off Mode & DLL on/off Switching procedure ................................................................................................274.4.1 DLL on/off switching procedure ...............................................................................................................274.4.2 DLL “on” to DLL “off” Procedure ..............................................................................................................274.4.3 DLL “off” to DLL “on” Procedure ..............................................................................................................284.5 DLL-off Mode........................................................................................................................................................294.6 Input Clock Frequency Change ............................................................................................................................304.7 Write Leveling.......................................................................................................................................................314.7.1 DRAM setting for write leveling & DRAM termination function in that mode ............................................324.7.2 Procedure Description .............................................................................................................................334.7.3 Write Leveling Mode Exit .........................................................................................................................34

    標(biāo)簽: DDR4

    上傳時(shí)間: 2022-01-09

    上傳用戶:

  • linux內(nèi)核編程指南

    因此,您想編寫一個(gè)內(nèi)核模塊。您知道C,您已經(jīng)編寫了一些可以作為進(jìn)程運(yùn)行的常規(guī)程序,現(xiàn)在您想知道真正的動(dòng)作在哪里,一個(gè)通配指針可以擦掉文件系統(tǒng),核心轉(zhuǎn)儲(chǔ)意味著重新啟動(dòng)。內(nèi)核模塊到底是什么?模塊是可以根據(jù)需要加載和卸載的代碼段。它們擴(kuò)展了內(nèi)核的功能,而無(wú)需重新引導(dǎo)系統(tǒng)。例如。模塊驅(qū)動(dòng)程序的一種類型是設(shè)備驅(qū)動(dòng)程序,它允許內(nèi)核訪問(wèn)沒(méi)有模塊的系統(tǒng)硬件,我們將不得不構(gòu)建單片內(nèi)核并將新功能直接添加到內(nèi)核映像中,除了具有更大的內(nèi)核之外,這還具有缺點(diǎn)每次我們想要新功能時(shí)都要求我們重建并重新啟動(dòng)內(nèi)核的過(guò)程So, you want to write a kernel module. You know C, you, ve written a few normal programs to run as processes, and now you want to get to where the real action is, to where a single wild pointer can wipe out your file system and a core dump means a reboot.What exactly is a kernel module? Modules are pieces of code that can be loaded and unloaded into th upon demand. They extend the FUNCTIONALITY of the kernel without the need to reboot the system. For example.one type of module is the device driver, which allows the kernel to access hardware connected to the syste without modules, we would have to build monolithic kernels and add new FUNCTIONALITY directly into the em ernel image, Besides having larger kernels

    標(biāo)簽: linux

    上傳時(shí)間: 2022-03-30

    上傳用戶:

  • HDMI 2.0 Spec

    HDMI-Definition Multimedia Interface Specification Version 2.0This document constitutes the Version 2.0 specification for the High-Definition Multimedia Interface (HDMI Specification Version 2.0). This Specification incorporates HDMI Specification Version 1.4b by reference and defines additional and improved FUNCTIONALITY. Mechanical, behavioral, and protocol requirements necessary for compliance are described for Sources, Sinks, Repeaters, and Cables.

    標(biāo)簽: hdmi

    上傳時(shí)間: 2022-04-22

    上傳用戶:

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