Luminary Micro provides an analog-to-digital converter (ADC) module on some members of theStellaris microcontroller family. The hardware resolution of the ADC is 10 bits; however, due to noiseand other accuracy-diminishing factors, the true accuracy is less than 10 bits. This application noteprovides a software-based oversampling technique, resulting in an improved Effective Number OfBits (ENOB) in the conversion result. This document describes methods of oversampling an inputsignal, and the impact on precision and overall system performance.
標簽： Oversampling Techniques ADC fo
上傳時間： 2013-12-17
上傳用戶：zhyiroy
Luminary Micro Stellaris™ microcontrollers that are equipped with an analog-to-digital converter(ADC), use an innovative sequence-based sampling architecture designed to be extremely flexible,yet easy to use. This application note describes the sampling architecture of the ADC. Sinceprogrammers can configure Stellaris microcontrollers either through the powerful StellarisFamilyDriver Library or through direct writes to the device's control registers, this application note describesboth methods. The information presented in this document is intended to complement the ADCchapter of the device datasheet, and assumes the reader has a basic understanding of howADCsfunction.
標簽： Microcontr Stellaris Using the
上傳時間： 2013-10-14
上傳用戶：blans
The ISO7220 and ISO7221 are dual-channel digital isolators. To facilitate PCB layout, the channels are orientedin the same direction in the ISO7220 and in opposite directions in the ISO7221. These devices have a logic inputand output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to4000 V. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, andprevent noise currents on a data bus or other circuits from entering the local ground and interfering with ordamaging sensitive circuitry.
上傳時間： 2013-10-24
上傳用戶：hbsunhui
基于單DSP的VoIP模擬電話適配器研究與實現:提出和實現了一種新穎的基于單個通用數字信號處理器(DSP)的VoIP模擬電話適配器方案。DSP的I/O和存儲資源非常有限，通常適于運算密集型應用，不適宜控制密集型應用[5]。該系統高效利用單DSP的I/O和片內外存儲器資源，采用μC/OS-II嵌入式實時操作系統，支持SIP和TCP-UDP/IP協議，通過LAN或者寬帶接入，使普通電話機成為Internet終端，實現IP電話。該系統軟硬件結構緊湊高效，運行穩定，成本低，具有廣闊的應用前景。關鍵詞：模擬電話適配器；IP電話；數字信號處理器；μC/OS-II 【Abstract】This paper presents a VoIP ATA solution based on a single digital signal processor (DSP). DSPs are suitable for arithmetic-intensiveapplication and unsuitable for control-intensive application because of the limitation of I/O and memory resources. This solution is based on a 16-bitfixed-point DSP and μC/OS-II embedded real-time operating system. It makes good use of the limited resources, supports SIP and TCP-UDP/IPprotocol. It can connect the analog telephone to Internet and realize the VoIP application. This system has a great future for its high efficiency andlow cost.【Key words】Analog telephone adapter (ATA); Voice over Internet protocol (VoIP); Digital signal processor (DSP); μC/OS-II Research and Implementation of VoIPATA Based on Single DSP
上傳時間： 2013-11-20
上傳用戶：Wwill
The PL2303 USB to Serial adapter is your smart and convenient accessory forconnecting RS-232 serial devices to your USB-equipped Windows host computer. Itprovides a bridge connection with a standard DB 9-pin male serial port connector inone end and a standard Type-A USB plug connector on the other end. You simplyattach the serial device onto the serial port of the cable and plug the USB connectorinto your PC USB port. It allows a simple and easy way of adding serial connectionsto your PC without having to go thru inserting a serial card and traditional portconfiguration.This USB to Serial adapter is ideal for connecting modems, cellular phones, PDAs,digital cameras, card readers and other serial devices to your computer. It providesserial connections up to 1Mbps of data transfer rate. And since USB does not requireany IRQ resource, more devices can be attached to the system without the previoushassles of device and resource conflicts.Finally, the PL-2303 USB to Serial adapter is a fully USB Specification compliantdevice and therefore supports advanced power management such as suspend andresume operations as well as remote wakeup. The PL-2303 USB Serial cable adapteris designed to work on all Windows operating systems.
上傳時間： 2013-11-01
上傳用戶：ghostparker
The SDI standards are the predominant standards for uncompressed digital videointerfaces in the broadcast studio and video production center. The first SDI standard,SD-SDI, allowed standard-definition digital video to be transported over the coaxial cableinfrastructure initially installed in studios to carry analog video. Next, HD-SDI wasto support high-definition video. Finally, dual link HD-SDI and 3G-SDIdoubled the bandwidth of HD-SDI to support 1080p (50 Hz and 60 Hz) and other videoformats requiring more bandwidth than HD-SDI provides.
上傳時間： 2013-10-08
上傳用戶：yjj631
The NXP LPC315x combine an 180 MHz ARM926EJ-S CPU core, High-speed USB 2.0OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, an integratedaudio codec, Li-ion charger, Real-Time Clock (RTC), and a myriad of serial and parallelinterfaces in a single chip targeted at consumer, industrial, medical, and communicationmarkets. To optimize system power consumption, the LPC315x have multiple powerdomains and a very flexible Clock Generation Unit (CGU) that provides dynamic clockgating and scaling.The LPC315x is implemented as multi-chip module with two side-by-side dies, one fordigital fuctions and one for analog functions, which include a Power Supply Unit (PSU),audio codec, RTC, and Li-ion battery charger.
上傳時間： 2014-01-17
上傳用戶：Altman
The SDI standards are the predominant standards for uncompressed digital videointerfaces in the broadcast studio and video production center. The first SDI standard,SD-SDI, allowed standard-definition digital video to be transported over the coaxial cableinfrastructure initially installed in studios to carry analog video. Next, HD-SDI wasto support high-definition video. Finally, dual link HD-SDI and 3G-SDIdoubled the bandwidth of HD-SDI to support 1080p (50 Hz and 60 Hz) and other videoformats requiring more bandwidth than HD-SDI provides.
上傳時間： 2013-12-08
上傳用戶：liansi
In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All theseproblems are accompanied by an example to have a better idea, and these can be taken care off if thesecoding guidelines are followed. Discussion of all the techniques is beyond the scope of this paper, however,here we try to cover a few of them.
標簽： Efficient Verilog Digital Coding
上傳時間： 2013-11-23
上傳用戶：我干你啊
This example demonstrates how to erase, write, and read the on-chip 640-byte EEPROM Data Memory of the Analog Devices ADuC812, ADuC814, ADuC816, and ADuC824 devivces. This example includes a µ Vision2 Project with a target for each supported device.
標簽： demonstrates example on-chip EEPROM
上傳時間： 2015-05-04
上傳用戶：wl9454
