針對TI公司最新發布的TMS320C6678 DSP設計出一種實用有效的電源。采用統一的12 V電源供電，制作出滿足電壓幅值要求與時序要求的開關電源。該設計主要由各類電源轉換電路組成，并通過使用Fusion Digital Power Designer軟件對電源芯片進行編程。仿真結果表明，該電源工作穩定，各方面的參數均符合要求。
在開放式數控系統結構模型的基礎上，研究了基于ISA總線的DSP通信控制原理。采用中斷方式完成了PC機和DSP之間的通信。介紹了以DriverWorks為工具開發ISA設備WDM驅動程序的方法，探討了中斷處理、驅動程序與應用程序之間的通信,簡要說明了驅動程序的安裝與調試。通過調試,系統設計運行穩定。
Abstract:
The ISA bus and DSP correspondence control principle is investigated in the basis of the existing open architecture numerical control system.The interrupt method is used to realize the communication between PC and DSP based on the ISA bus.The methods of WDM driver exploitation for ISA device using Driver Works are introduced.The main process of driver program and the keys such as handle interrupt and the communication between the drivers and application are presented.And how to debug and install the drive is explained.
Virtex-5, Spartan-DSP FPGAs Application Note
This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step instruction is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.
TI DSP的發展同集成電路的發展一樣,新的DSP都是3.3V的,但目前還有許多外圍電路是5V的,因此在DSP系統中,經常有5V和3.3V的DSP混接問題。在這些系統中,應注意： 1)DSP輸出給5V的電路（如D/A）,無需加任何緩沖電路,可以直接連接。 2)DSP輸入5V的信號（如A/D）,由于輸入信號的電壓>4V,超過了DSP的電源電壓,DSP的外部信號沒有保護電路,需要加緩沖,如74LVC245等,將5V信號變換成3.3V的信號。 3)仿真器的JTAG口的信號也必須為3.3V,否則有可能損壞DSP。
