This overview guide describes all the peripherals available for TMS320x28xx and TMS320x28xxx devices.Section 2 shows the peripherals used by each device. Section 3 provides descriptions of the peripherals.You can download the peripheral guide by clicking on the literature number, which is linked to the portable document format (pdf) file.
標(biāo)簽： 281x Dsp 281 外設(shè)
上傳時(shí)間： 2013-11-21
上傳用戶(hù)：HGH77P99
This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microprocessor application. This reference system also uses a DCM that isconfigured so that the phase of its output clock can be changed while the system is running anda GPIO core that controls that phase shift. The GPIO output is controlled by a softwareapplication that can be run on a PowerPC® 405 or Microblaze™ microprocessor.
上傳時(shí)間： 2013-10-15
上傳用戶(hù)：euroford
波長(zhǎng)信號(hào)的解調(diào)是實(shí)現(xiàn)光纖光柵傳感網(wǎng)絡(luò)的關(guān)鍵，基于現(xiàn)有的光纖光柵傳感器解調(diào)方法，提出一種基于FPGA的雙匹配光纖光柵解調(diào)方法，此系統(tǒng)是一種高速率、高精度、低成本的解調(diào)系統(tǒng)，并且通過(guò)引入雙匹配光柵有效地克服了雙值問(wèn)題同時(shí)擴(kuò)大了檢測(cè)范圍。分析了光纖光柵的測(cè)溫原理并給出了該方案軟硬件設(shè)計(jì)，綜合考慮系統(tǒng)的解調(diào)精度和FPGA的處理速度給出了基于拉格朗日的曲線(xiàn)擬合算法。 Abstract: Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network， based on several existing methods of fiber grating sensor demodulation inadequate， a two-match fiber grating demodulation method was presented. This system is a high-speed， high precision， low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA，this paper gives the curve fitting algorithm based on Lagrange.
標(biāo)簽： FPGA 光纖光柵 解調(diào)系統(tǒng)
上傳時(shí)間： 2014-07-24
上傳用戶(hù)：caiguoqing
The correct answer for each test bank question is highlighted in bold. Test bank questions are based on the end-of-chapter questions. If a student studies the end-of-chapter questions (which are linked to the italicized words in each chapter), then they will be successful on the test bank questions.
標(biāo)簽： 半導(dǎo)體制造技術(shù) 英文 教程
上傳時(shí)間： 2014-12-31
上傳用戶(hù)：旗魚(yú)旗魚(yú)
This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microprocessor application. This reference system also uses a DCM that isconfigured so that the phase of its output clock can be changed while the system is running anda GPIO core that controls that phase shift. The GPIO output is controlled by a softwareapplication that can be run on a PowerPC® 405 or Microblaze™ microprocessor.
上傳時(shí)間： 2014-11-26
上傳用戶(hù)：erkuizhang
This application note shows how a Xilinx CoolRunnerTM-II CPLD can be used as a simplelogical switch that can quickly and reliably select between different MPEG video sources. Thesource code for the design is available on the Xilinx website, and is linked from the “VHDLCode” section. The code can be expanded by the user to perform additional operations usingthe remaining CPLD resources
標(biāo)簽： CoolRunner-II Xilinx XAPP CPLD
上傳時(shí)間： 2013-12-16
上傳用戶(hù)：qwer0574
波長(zhǎng)信號(hào)的解調(diào)是實(shí)現(xiàn)光纖光柵傳感網(wǎng)絡(luò)的關(guān)鍵，基于現(xiàn)有的光纖光柵傳感器解調(diào)方法，提出一種基于FPGA的雙匹配光纖光柵解調(diào)方法，此系統(tǒng)是一種高速率、高精度、低成本的解調(diào)系統(tǒng)，并且通過(guò)引入雙匹配光柵有效地克服了雙值問(wèn)題同時(shí)擴(kuò)大了檢測(cè)范圍。分析了光纖光柵的測(cè)溫原理并給出了該方案軟硬件設(shè)計(jì)，綜合考慮系統(tǒng)的解調(diào)精度和FPGA的處理速度給出了基于拉格朗日的曲線(xiàn)擬合算法。 Abstract: Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network， based on several existing methods of fiber grating sensor demodulation inadequate， a two-match fiber grating demodulation method was presented. This system is a high-speed， high precision， low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA，this paper gives the curve fitting algorithm based on Lagrange.
標(biāo)簽： FPGA 光纖光柵 解調(diào)系統(tǒng)
上傳時(shí)間： 2013-10-10
上傳用戶(hù)：zxc23456789
第二部分：DRAM 內(nèi)存模塊的設(shè)計(jì)技術(shù)..............................................................143第一章 SDR 和DDR 內(nèi)存的比較..........................................................................143第二章 內(nèi)存模塊的疊層設(shè)計(jì).............................................................................145第三章 內(nèi)存模塊的時(shí)序要求.............................................................................1493.1 無(wú)緩沖（Unbuffered）內(nèi)存模塊的時(shí)序分析.......................................1493.2 帶寄存器（Registered）的內(nèi)存模塊時(shí)序分析...................................154第四章 內(nèi)存模塊信號(hào)設(shè)計(jì).................................................................................1594.1 時(shí)鐘信號(hào)的設(shè)計(jì).......................................................................................1594.2 CS 及CKE 信號(hào)的設(shè)計(jì)..............................................................................1624.3 地址和控制線(xiàn)的設(shè)計(jì)...............................................................................1634.4 數(shù)據(jù)信號(hào)線(xiàn)的設(shè)計(jì)...................................................................................1664.5 電源，參考電壓Vref 及去耦電容.........................................................169第五章 內(nèi)存模塊的功耗計(jì)算.............................................................................172第六章 實(shí)際設(shè)計(jì)案例分析.................................................................................178 目前比較流行的內(nèi)存模塊主要是這三種：SDR，DDR，RAMBUS。其中，RAMBUS內(nèi)存采用阻抗受控制的串行連接技術(shù),在這里我們將不做進(jìn)一步探討，本文所總結(jié)的內(nèi)存設(shè)計(jì)技術(shù)就是針對(duì)SDRAM 而言(包括SDR 和DDR)。現(xiàn)在我們來(lái)簡(jiǎn)單地比較一下SDR 和DDR，它們都被稱(chēng)為同步動(dòng)態(tài)內(nèi)存，其核心技術(shù)是一樣的。只是DDR 在某些功能上進(jìn)行了改進(jìn)，所以DDR 有時(shí)也被稱(chēng)為SDRAM II。DDR 的全稱(chēng)是Double Data Rate，也就是雙倍的數(shù)據(jù)傳輸率，但是其時(shí)鐘頻率沒(méi)有增加，只是在時(shí)鐘的上升和下降沿都可以用來(lái)進(jìn)行數(shù)據(jù)的讀寫(xiě)操作。對(duì)于SDR 來(lái)說(shuō),市面上常見(jiàn)的模塊主要有PC100/PC133/PC166,而相應(yīng)的DDR內(nèi)存則為DDR200(PC1600)/DDR266(PC2100)/DDR333(PC2700)。
標(biāo)簽： DRAM 內(nèi)存模塊 設(shè)計(jì)技術(shù)
上傳時(shí)間： 2013-10-18
上傳用戶(hù)：宋桃子
This article is based in part on Bob Place s ADO is AOK (a simple ADO tutorial). Wrapper Usage This is consist of 2 classes. CDyndb : This Class manages connections and recordsets. Recordsets are organized as linked list (CList) and you can access them using their ids. CDynRec : This class is the node to populate for each recordsets. ADO封裝器類(lèi) 這篇文章一部分基于Bob Place的《ADO is AOK》 (簡(jiǎn)單的ADO指導(dǎo)) 。 包裹的用法 由2個(gè)類(lèi)組成。 類(lèi)CDyndb: 這個(gè)類(lèi)別管理連接和記錄集。記錄集是連接起來(lái)的記錄的集合，你可以通過(guò)他們的ID訪問(wèn)他們。 類(lèi)CDynRec: 這個(gè)類(lèi)別存放記錄集的代碼。
標(biāo)簽： This ADO tutorial article
上傳時(shí)間： 2013-12-14
上傳用戶(hù)：wfl_yy
MemCheck Driver Memory Tool The MemCheck code is designed to provide Windows NT/2K/XP driver developers with a tool to help in the detection of the following memory handling issues: Buffer overrun Buffer corruption Buffer use after buffer release Double buffer releases
標(biāo)簽： MemCheck designed Windows develop
上傳時(shí)間： 2014-12-05
上傳用戶(hù)：weiwolkt
蟲(chóng)蟲(chóng)下載站版權(quán)所有 京ICP備2021023401號(hào)-1
