The Cyclone® III PCI development board provides a hardware platform for developing and
prototyping low-power, high-performance, logic-intensive PCI-based designs. The board provides a
high-density of the memory to facilitate the design and development of FPGA designs which need
huge memory storage, and also includes Low-Voltage Differential Signaling (LVDS) interface of
the High-Speed Terasic Connectors (HSTCs) for extra high-speed interface application.
樣板 B 樹 ( B - tree )
規則 :
(1) 每個節點內元素個數在 [MIN,2*MIN] 之間, 但根節點元素個數為 [1,2*MIN]
(2) 節點內元素由小排到大, 元素不重複
(3) 每個節點內的指標個數為元素個數加一
(4) 第 i 個指標所指向的子節點內的所有元素值皆小於父節點的第 i 個元素
(5) B 樹內的所有末端節點深度一樣
