/*--------- 8051內(nèi)核特殊功能寄存器 -------------*/ sfr ACC = 0xE0; //累加器 sfr B = 0xF0; //B 寄存器 sfr PSW = 0xD0; //程序狀態(tài)字寄存器 sbit CY = PSW^7; //進(jìn)位標(biāo)志位 sbit AC = PSW^6; //輔助進(jìn)位標(biāo)志位 sbit F0 = PSW^5; //用戶標(biāo)志位0 sbit RS1 = PSW^4; //工作寄存器組選擇控制位 sbit RS0 = PSW^3; //工作寄存器組選擇控制位 sbit OV = PSW^2; //溢出標(biāo)志位 sbit F1 = PSW^1; //用戶標(biāo)志位1 sbit P = PSW^0; //奇偶標(biāo)志位 sfr SP = 0x81; //堆棧指針寄存器 sfr DPL = 0x82; //數(shù)據(jù)指針0低字節(jié) sfr DPH = 0x83; //數(shù)據(jù)指針0高字節(jié) /*------------ 系統(tǒng)管理特殊功能寄存器 -------------*/ sfr PCON = 0x87; //電源控制寄存器 sfr AUXR = 0x8E; //輔助寄存器 sfr AUXR1 = 0xA2; //輔助寄存器1 sfr WAKE_CLKO = 0x8F; //時(shí)鐘輸出和喚醒控制寄存器 sfr CLK_DIV = 0x97; //時(shí)鐘分頻控制寄存器 sfr BUS_SPEED = 0xA1; //總線速度控制寄存器 /*----------- 中斷控制特殊功能寄存器 --------------*/ sfr IE = 0xA8; //中斷允許寄存器 sbit EA = IE^7; //總中斷允許位 sbit ELVD = IE^6; //低電壓檢測(cè)中斷控制位 8051
上傳時(shí)間： 2013-10-30
上傳用戶：yxgi5
#include<iom16v.h> #include<macros.h> #define uint unsigned int #define uchar unsigned char uint a,b,c,d=0; void delay(c) { for for(a=0;a<c;a++) for(b=0;b<12;b++); }; uchar tab[]={ 0xc0,0xf9,0xa4,0xb0,0x99,0x92,0x82,0xf8,0x80,0x90,
標(biāo)簽： AVR 單片機(jī) 數(shù)碼管
上傳時(shí)間： 2013-10-21
上傳用戶：13788529953
This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System
標(biāo)簽： FPGA 安全系統(tǒng)
上傳時(shí)間： 2013-11-05
上傳用戶：維子哥哥
Xilinx Next Generation 28 nm FPGA Technology Overview Xilinx has chosen 28 nm high-κ metal gate (HKMG) highperformance,low-power process technology and combined it with a new unified ASMBL™ architecture to create a new generation of FPGAs that offer lower power and higher performance. These devices enable unprecedented levels of integration and bandwidth and provide system architects and designers a fully programmable alternative to ASSPs and ASICs.
上傳時(shí)間： 2014-12-28
上傳用戶：zhang97080564
摘要: 串行傳輸技術(shù)具有更高的傳輸速率和更低的設(shè)計(jì)成本, 已成為業(yè)界首選, 被廣泛應(yīng)用于高速通信領(lǐng)域。提出了一種新的高速串行傳輸接口的設(shè)計(jì)方案, 改進(jìn)了Aurora 協(xié)議數(shù)據(jù)幀格式定義的弊端, 并采用高速串行收發(fā)器Rocket I/O, 實(shí)現(xiàn)數(shù)據(jù)率為2.5 Gbps的高速串行傳輸。關(guān)鍵詞: 高速串行傳輸; Rocket I/O; Aurora 協(xié)議 為促使FPGA 芯片與串行傳輸技術(shù)更好地結(jié)合以滿足市場(chǎng)需求, Xilinx 公司適時(shí)推出了內(nèi)嵌高速串行收發(fā)器RocketI/O 的Virtex II Pro 系列FPGA 和可升級(jí)的小型鏈路層協(xié)議———Aurora 協(xié)議。Rocket I/O支持從622 Mbps 至3.125 Gbps的全雙工傳輸速率, 還具有8 B/10 B 編解碼、時(shí)鐘生成及恢復(fù)等功能, 可以理想地適用于芯片之間或背板的高速串行數(shù)據(jù)傳輸。Aurora 協(xié)議是為專有上層協(xié)議或行業(yè)標(biāo)準(zhǔn)的上層協(xié)議提供透明接口的第一款串行互連協(xié)議, 可用于高速線性通路之間的點(diǎn)到點(diǎn)串行數(shù)據(jù)傳輸, 同時(shí)其可擴(kuò)展的帶寬, 為系統(tǒng)設(shè)計(jì)人員提供了所需要的靈活性[4]。但該協(xié)議幀格式的定義存在弊端,會(huì)導(dǎo)致系統(tǒng)資源的浪費(fèi)。本文提出的設(shè)計(jì)方案可以改進(jìn)Aurora 協(xié)議的固有缺陷,提高系統(tǒng)性能, 實(shí)現(xiàn)數(shù)據(jù)率為2.5 Gbps 的高速串行傳輸, 具有良好的可行性和廣闊的應(yīng)用前景。
標(biāo)簽： Rocket 2.5 高速串行 收發(fā)器
上傳時(shí)間： 2013-11-06
上傳用戶：smallfish
Radio Frequency Identifi cation (RFID) technology usesradiated and refl ected RF power to identify and track avariety of objects. A typical RFID system consists of areader and a transponder (or tag). An RFID reader containsan RF transmitter, one or more antennas and an RFreceiver. An RFID tag is simply an uniquely identifi ed ICwith an antenna.
上傳時(shí)間： 2013-10-17
上傳用戶：lepoke
提出了一種以ARM微處理器為控制核心的遠(yuǎn)程無線視頻監(jiān)控終端的設(shè)計(jì)方案，其監(jiān)控終端的硬件設(shè)計(jì)包括視頻采集處理、中央管理控制、無線傳輸3個(gè)模塊。并給出了監(jiān)控終端的軟件開發(fā)平臺(tái)和開發(fā)模式的系統(tǒng)啟動(dòng)代碼、嵌入式Linux系統(tǒng)移植以及驅(qū)動(dòng)程序和應(yīng)用程序。測(cè)試結(jié)果表明，該監(jiān)控終端設(shè)計(jì)方案合理、有效，基本滿足監(jiān)控需求。 Abstract: A remote wireless video monitoring terminal design， which uses ARM microprocessor as its core control， is proposed in this paper.The hardware design of monitoring terminal system is composed of the video acquisition and processing module， the central management and control module， wireless transmission module.Meanwhile the monitoring terminal-s software development platform and development patterns are designed. Also the design of the system-s start codes， embedded Linux system-s transplantation process， driver and the corresponding applications are given. The results showed that the monitoring terminal design is reasonable， effective， basically meet monitoring requirements.
標(biāo)簽： ARM 遠(yuǎn)程無線 視頻監(jiān)控 終端設(shè)計(jì)
上傳時(shí)間： 2013-11-13
上傳用戶：wanqunsheng
This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System
標(biāo)簽： FPGA 安全系統(tǒng)
上傳時(shí)間： 2013-11-14
上傳用戶：zoudejile
Xilinx Next Generation 28 nm FPGA Technology Overview Xilinx has chosen 28 nm high-κ metal gate (HKMG) highperformance,low-power process technology and combined it with a new unified ASMBL™ architecture to create a new generation of FPGAs that offer lower power and higher performance. These devices enable unprecedented levels of integration and bandwidth and provide system architects and designers a fully programmable alternative to ASSPs and ASICs.
上傳時(shí)間： 2013-12-07
上傳用戶：bruce
摘要: 串行傳輸技術(shù)具有更高的傳輸速率和更低的設(shè)計(jì)成本, 已成為業(yè)界首選, 被廣泛應(yīng)用于高速通信領(lǐng)域。提出了一種新的高速串行傳輸接口的設(shè)計(jì)方案, 改進(jìn)了Aurora 協(xié)議數(shù)據(jù)幀格式定義的弊端, 并采用高速串行收發(fā)器Rocket I/O, 實(shí)現(xiàn)數(shù)據(jù)率為2.5 Gbps的高速串行傳輸。關(guān)鍵詞: 高速串行傳輸; Rocket I/O; Aurora 協(xié)議 為促使FPGA 芯片與串行傳輸技術(shù)更好地結(jié)合以滿足市場(chǎng)需求, Xilinx 公司適時(shí)推出了內(nèi)嵌高速串行收發(fā)器RocketI/O 的Virtex II Pro 系列FPGA 和可升級(jí)的小型鏈路層協(xié)議———Aurora 協(xié)議。Rocket I/O支持從622 Mbps 至3.125 Gbps的全雙工傳輸速率, 還具有8 B/10 B 編解碼、時(shí)鐘生成及恢復(fù)等功能, 可以理想地適用于芯片之間或背板的高速串行數(shù)據(jù)傳輸。Aurora 協(xié)議是為專有上層協(xié)議或行業(yè)標(biāo)準(zhǔn)的上層協(xié)議提供透明接口的第一款串行互連協(xié)議, 可用于高速線性通路之間的點(diǎn)到點(diǎn)串行數(shù)據(jù)傳輸, 同時(shí)其可擴(kuò)展的帶寬, 為系統(tǒng)設(shè)計(jì)人員提供了所需要的靈活性[4]。但該協(xié)議幀格式的定義存在弊端,會(huì)導(dǎo)致系統(tǒng)資源的浪費(fèi)。本文提出的設(shè)計(jì)方案可以改進(jìn)Aurora 協(xié)議的固有缺陷,提高系統(tǒng)性能, 實(shí)現(xiàn)數(shù)據(jù)率為2.5 Gbps 的高速串行傳輸, 具有良好的可行性和廣闊的應(yīng)用前景。
標(biāo)簽： Rocket 2.5 高速串行 收發(fā)器
上傳時(shí)間： 2013-10-13
上傳用戶：lml1234lml
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