linux那些事兒之一
上傳時間： 2013-10-19
上傳用戶：wab1981
This document provides an overview of the MPC8313E PowerQUICC™II Pro processor features, including a block diagram showing the major functional components.
標簽： PowerQUICC 8313E 8313 MPC
上傳時間： 2013-11-20
上傳用戶：myworkpost
闡述了軌道交通列車定位技術。介紹了在軌道交通系統中列車定位技術的功能，國內外軌道交通中主要采用的列車定位方法，重點論述了幾種主要定位技術，并從定位精度、閉塞制式、維護投資成本、抗干擾等方面進行分析比較。提出目前軌道交通定位技術應綜合運用，取長補短，多種方法相互融合，才能滿足軌道交通中對安全可靠性的要求。 Abstract: Rail train positioning technology is described. The paper introduces the funetions of the train positioning technology in the rail transit system， the main methods of train positioning do mestic and international rail， and focuses on several key methods， analyzes and compares from the positioning accuracy， block system, maintenance and investment cost， interference and so on， suggested that the current rail positioning technology should be integrated use of positioning method of meriging， learn from each other， to meet the reliability requirements of rail safety.
上傳時間： 2013-11-25
上傳用戶：franktu
The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embeddedapplications. The ARM Cortex-M3 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC1850/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals. The ARMCortex-M3 CPU also includes an internal prefetch unit that supports speculativebranching.The LPC1850/30/20/10 include up to 200 kB of on-chip SRAM data memory, a quad SPIFlash Interface (SPIFI), a State Configuration Timer (SCT) subsystem, two High-speedUSB controllers, Ethernet, LCD, an external memory controller, and multiple digital andanalog peripherals.
上傳時間： 2014-12-31
上傳用戶：zhuoying119
The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cortex-M4 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC4350/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals, andincludes an internal prefetch unit that supports speculative branching. The ARMCortex-M4 supports single-cycle digital signal processing and SIMD instructions. Ahardware floating-point processor is integrated in the core.The LPC4350/30/20/10 include an ARM Cortex-M0 coprocessor, up to 264 kB of datamemory, advanced configurable peripherals such as the State Configurable Timer (SCT)and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers,Ethernet, LCD, an external memory controller, and multiple digital and analog peripherals
上傳時間： 2013-10-28
上傳用戶：15501536189
PCI Express是由Intel，Dell，Compaq，IBM，Microsoft等PCI SIG聯合成立的Arapahoe Work Group共同草擬并推舉成取代PCI總線標準的下一代標準。PCI Express利用串行的連接特點能輕松將數據傳輸速度提到一個很高的頻率，達到遠遠超出PCI總線的傳輸速率。一個PCI Express連接可以被配置成x1，x2，x4，x8，x12，x16和x32的數據帶寬。x1的通道能實現單向312.5 MB／s（2.5 Gb／s）的傳輸速率。Xilinx公司的Virtex5系列FPGA芯片內嵌PCI-ExpressEndpoint Block硬核，為實現單片可配置PCI-Express總線解決方案提供了可能。 本文在研究PCI-Express接口協議和PCI-Express Endpoint Block硬核的基礎上，使用Virtex5LXT50 FPGA芯片設計PCI Express接口硬件電路，實現PCI-Express數據傳輸
上傳時間： 2013-12-27
上傳用戶：wtrl
基于RAM塊的應用
上傳時間： 2015-01-01
上傳用戶：13681659100
This application note describes how the existing dual-port block memories in the Spartan™-IIand Virtex™ families can be used as Quad-Port memories. This essentially involves a dataaccess time (halved) versus functionality (doubled) trade-off. The overall bandwidth of the blockmemory in terms of bits per second will remain the same.
上傳時間： 2014-01-24
上傳用戶：15527161163
The PLB BRAM Interface Controller is a module thatattaches to the PLB (Processor Local Bus).
上傳時間： 2013-10-27
上傳用戶：Breathe0125
The PPC405 Virtex-4 is a wrapper around the Virtex-4PowerPC™ 405 Processor Block primitive. For detailsregarding the PowerPC 405, see the PowerPC 405 ProcessorBlock Reference Guide.
上傳時間： 2015-01-02
上傳用戶：JIUSHICHEN
