In today’s world of modular networking and telecommunications design, it is becomingincreasingly difficult to keep alignment with the many different and often changing interfaces,both inter-BOARD and intra-BOARD. Each manufacturer has their own spin on the way in whichdevices are connected. To satisfy the needs of our customers, we must be able to support alltheir interface requirements. For us to be able to make products for many customers, we mustadopt a modular approach to the design. This modularity is the one issue that drives the majorproblem of shifting our bits from one modular interface to another.
標(biāo)簽： 150 WP 兆兆 網(wǎng)絡(luò)
上傳時(shí)間： 2013-11-25
上傳用戶：suicone
主機(jī)板(簡(jiǎn)稱Mother BOARD)是計(jì)算機(jī)主機(jī)的軀體，它承載用戶操作使用的各類設(shè)備，負(fù)責(zé)設(shè)備的數(shù)據(jù)處理和控制
標(biāo)簽： 主機(jī)
上傳時(shí)間： 2014-12-29
上傳用戶：q986086481
A Computer-On-Module, or COM, is a Module with all components necessary for a bootable host computer, packaged as a super component. A COM requires a Carrier BOARD to bring out I/O and to power up. COMs are used to build single BOARD computer solutions and offer OEMs fast time-to-market with reduced development cost. Like integrated circuits, they provide OEMs with significant freedom in meeting form-fit-function requirements. For all these reasons the COM methodology has gained much popularity with OEMs in the embedded industry. COM Express® is an open industry standard for Computer-On-Modules. It is designed to be future proof and to provide a smooth transition path from legacy parallel interfaces to LVDS (Low Voltage Differential Signaling) interfaces. These include the PCI bus and parallel ATA on the one hand and PCI Express and Serial ATA on the other hand.
上傳時(shí)間： 2013-11-05
上傳用戶：Wwill
The Maxim Integrated 71M6541-DB REV 3.0 Demo BOARD is a demonstration BOARD for evaluating the 71M6541 device for single-phase electronic energy metering applications in conjunction with the Remote Sensor Inter-face. It incorporates a 71M6541 integrated circuit, a 71M6601 Remote Interface IC, peripheral circuitry such as a serial EEPROM, emulator port, and on-BOARD power supply. A serial to USB converter allows communication to a PC through a USB port. The Demo BOARD allows the evaluation of the 71M6541 energy meter chip for measurement accuracy and overall system use.
標(biāo)簽： 71M6541 演示板 用戶手冊(cè)
上傳時(shí)間： 2013-11-06
上傳用戶：雨出驚人love
STM32學(xué)習(xí)資料
標(biāo)簽： Evaluation 320518 BOARD EVAL
上傳時(shí)間： 2013-10-31
上傳用戶：看到了沒有
This application note provides step-by-step instructions on how to recreate a Tri-Mode Ethernet(TEMAC) performance testing system using the ML405 BOARD and MontaVista Linux 4.0. Thisapplication note shows how to set up a simple EDK Base System Builder system on the ML405Evaluation Platform and run performance tests. The network architecture for the test isdescribed. A system is built and downloaded into the FPGA. A MontaVista Linux kernel isconfigured, built, and downloaded into the ML405 Evaluation Platform. The instructions forobtaining and setting up the software used to perform the measurements, netperf, are given.
標(biāo)簽： Virtex TEMAC XAPP 1023
上傳時(shí)間： 2013-11-11
上傳用戶：saharawalker
The NCV7356 is a physical layer device for a single wire data linkcapable of operating with various Carrier Sense Multiple Accesswith Collision Resolution (CSMA/CR) protocols such as the BoschController Area Network (CAN) version 2.0. This serial data linknetwork is intended for use in applications where high data rate is notrequired and a lower data rate can achieve cost reductions in both thephysical media components and in the microprocessor and/ordedicated logic devices which use the network.The network shall be able to operate in either the normal data ratemode or a high-speed data download mode for assembly line andservice data transfer operations. The high-speed mode is onlyintended to be operational when the bus is attached to an off-BOARDservice node. This node shall provide temporary bus electrical loadswhich facilitate higher speed operation. Such temporary loads shouldbe removed when not performing download operations.The bit rate for normal communications is typically 33 kbit/s, forhigh-speed transmissions like described above a typical bit rate of83 kbit/s is recommended. The NCV7356 features undervoltagelockout, timeout for faulty blocked input signals, output blankingtime in case of bus ringing and a very low sleep mode current.
上傳時(shí)間： 2013-10-24
上傳用戶：s藍(lán)莓汁
電力設(shè)備熱點(diǎn)溫度與電流在線監(jiān)測(cè)預(yù)警系統(tǒng)工作在大型變壓器旁，極易受電磁輻射干擾，針對(duì)該預(yù)警系統(tǒng)的子系統(tǒng)：無線傳輸部分進(jìn)行了抗電磁干擾設(shè)計(jì)，采用Ansoft Designer軟件仿真分析了PCB（Printed Circuit BOARD）中電磁波對(duì)PCB電磁兼容性產(chǎn)生的影響，根據(jù)其得出的PCB的電流圖及近場(chǎng)分布圖，分析PCB的電磁兼容性，針對(duì)結(jié)果中的電磁輻射過高區(qū)域進(jìn)行了重新設(shè)計(jì)，經(jīng)Ansoft Designer驗(yàn)證，重新設(shè)計(jì)后的PCB各項(xiàng)指數(shù)有所下降，電磁兼容性得到提高。
標(biāo)簽： Zigbee 無線傳輸 抗電磁干擾 優(yōu)化設(shè)計(jì)
上傳時(shí)間： 2013-11-11
上傳用戶：ggwz258
摘要：采用表面組裝技術(shù)（surface mountt echnology,SMT）進(jìn)行印制板級(jí)電子電路組裝是當(dāng)代組裝技術(shù)發(fā)展的主流。典型的SMT生產(chǎn)線是由高速機(jī)和多功能機(jī)串聯(lián)而成，印制電路板（printed circuit BOARD,PCB）上的元器件在貼片機(jī)之間的負(fù)荷均衡優(yōu)化問題是SMT生產(chǎn)調(diào)度的關(guān)鍵問題。以使貼片時(shí)間與更換吸嘴時(shí)間之和最大的工作臺(tái)生產(chǎn)時(shí)間最小化為目標(biāo)構(gòu)建了負(fù)荷均衡模型，開發(fā)了相應(yīng)的遺傳算法，并進(jìn)行了數(shù)值實(shí)驗(yàn)與算法評(píng)價(jià)。與生產(chǎn)時(shí)間理論下界和現(xiàn)場(chǎng)機(jī)器自帶軟件調(diào)度方案的對(duì)比表明了模型及其算法的有效性。關(guān)鍵詞：印制電路板；表面組裝生產(chǎn)線；負(fù)荷分配；生產(chǎn)線優(yōu)化
標(biāo)簽： SMT 生產(chǎn)線 均衡 貼片機(jī)
上傳時(shí)間： 2013-10-09
上傳用戶：亞亞娟娟123
This example shows how to update at regulate period the WWDG counter using theEarly Wakeup interrupt (EWI). The WWDG timeout is set to 262ms, refresh window set to 41h and the EWI isenabled. When the WWDG counter reaches 40h the EWI is generated and in the WWDGISR the counter is refreshed to prevent a WWDG reset and led connected to PC.07is toggled.The EXTI line9 is connected to PB.09 pin and configured to generate an interrupton falling edge.In the NVIC, EXTI line9 to 5 interrupt vector is enabled with priority equal to 0and the WWDG interrupt vector is enabled with priority equal to 1 (EXTI IT > WWDG IT). The EXTI Line9 will be used to simulate a software failure: once the EXTI line9event occurs (by pressing Key push-button on EVAL BOARD) the correspondent interruptis served, in the ISR the led connected to PC.07 is turned off and the EXTI line9pending bit is not cleared. So the CPU will execute indefinitely EXTI line9 ISR andthe WWDG ISR will never be entered(WWDG counter not updated). As result, when theWWDG counter falls to 3Fh the WWDG reset occurs.If the EXTI line9 event don抰 occurs the WWDG counter is indefinitely refreshed inthe WWDG ISR which prevent from WWDG reset. If the WWDG reset is generated, after resuming from reset a led connected to PC.06is turned on. In this example the system is clocked by the HSE(8MHz).
上傳時(shí)間： 2013-11-11
上傳用戶：gundamwzc
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