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machine learning

  • - XCS for Dynamic Environments + Continuous versions of XCS + Test problem: real multiplexer +

    - XCS for Dynamic Environments + Continuous versions of XCS + Test problem: real multiplexer + Experiments: XCS is explored in dynamic environments with different magnitudes of change to the underlying concepts. +Reference papers: H.H. Dam, H.A. Abbass, C.J. Lokan, Evolutionary Online Data Mining – an Investigation in a Dynamic Environment. 2005, accepted for a book chapter in Springer Series on Studies in Computational Intelligence H.H. Dam, H.A. Abbass, C.J. Lokan, Be Real! XCS with Continuous-Valued Inputs. IWLCS 2005, (International Workshop on Learning Classifier Systems). Washington DC, June 2005.

    標簽: Environments multiplexer Continuous XCS

    上傳時間: 2015-07-04

    上傳用戶:Avoid98

  • Simulation of RM(1,3), equivalent to the (8,4,4) extended Hamming code. Soft-decision decoding perf

    Simulation of RM(1,3), equivalent to the (8,4,4) extended Hamming code. Soft-decision decoding performed by the Green machine

    標簽: Soft-decision Simulation equivalent decoding

    上傳時間: 2015-07-05

    上傳用戶:lindor

  • This a set of notes I put together for my Computer Architecture class in 1990. Students had a proje

    This a set of notes I put together for my Computer Architecture class in 1990. Students had a project in which they had to model a microprocessor architecture of their choice. They used these notes to learn VHDL. The notes cover the VHDL-87 version of the language. Not all of the language is covered (about 95%). You may use this booklet for your own personal learning purposes. You may not use it for profit (eg, selling copies of it, using it in a course for which people pay, etc). If you want to make use of it beyond these conditions, contact me and we can come to some arrangement.

    標簽: Architecture Computer Students together

    上傳時間: 2014-01-15

    上傳用戶:wxhwjf

  • The DSP Design Flow workshop provides an introduction to the advanced tools you need to design and i

    The DSP Design Flow workshop provides an introduction to the advanced tools you need to design and implement DSP algorithms targeting FPGAs. This intermediate workshop in implementing DSP functions focuses on learning how to use System Generator for DSP, as well as HDL design flow, CORE Generator software, and design implementation tools. Through hands-on exercises, you will implement a design from algorithm concept to verification.

    標簽: introduction workshop provides advanced

    上傳時間: 2014-12-06

    上傳用戶:sammi

  • 三本經典UML 2.0書籍

    三本經典UML 2.0書籍, OReilly.Learning.UML.2.0.Apr.2006.chm OReilly.UML.2.0.in.a.Nutshell.Jun.2005.chm UML Distilled_3Ed.chm

    標簽: UML 2.0 書籍

    上傳時間: 2015-08-19

    上傳用戶:dapangxie

  • The cable compensation system is an experiment system that performs simulations of partial or microg

    The cable compensation system is an experiment system that performs simulations of partial or microgravity environments on earth. It is a highly nonlinear and complex system.In this paper, a network based on the theory of the Fuzzy Cerebellum Model Articulation Controller(FCMAC) is proposed to control this cable compensation system. In FCMAC ,without appropriate learning rate, the control system based on FCMAC will become unstable or its convergence speed will become slow.In order to guarantee the convergence of tracking error, we present a new kind of optimization based on adaptive GA for selecting learning rate.Furthermore, this approach is evaluated and its performance is discussed.The simulation results shows that performance of the FCMAC based the proposed method is stable and more effective.

    標簽: system compensation simulations experiment

    上傳時間: 2015-08-26

    上傳用戶:希醬大魔王

  • by Randal L. Schwartz and Tom Phoenix ISBN 0-596-00132-0 Third Edition, published July 2001. (See

    by Randal L. Schwartz and Tom Phoenix ISBN 0-596-00132-0 Third Edition, published July 2001. (See the catalog page for this book.) the text of Learning Perl, 3rd Edition. Table of Contents Copyright Page Preface Chapter 1: Introduction Chapter 2: Scalar Data Chapter 3: Lists and Arrays Chapter 4: Subroutines Chapter 5: Hashes Chapter 6: I/O Basics Chapter 7: Concepts of Regular Expressions Chapter 8: More About Regular Expressions Chapter 9: Using Regular Expressions Chapter 10: More Control Structures Chapter 11: Filehandles and File Tests Chapter 12: Directory Operations Chapter 13: Manipulating Files and Directories Chapter 14: Process Management Chapter 15: Strings and Sorting Chapter 16: Simple Databases Chapter 17: Some Advanced Perl Techniques Appendix A: Exercise Answers Appendix B: Beyond the Llama Index Colophon

    標簽: L. published Schwartz Edition

    上傳時間: 2014-11-29

    上傳用戶:kr770906

  • by Randal L. Schwartz and Tom Phoenix ISBN 0-596-00132-0 Third Edition, published July 2001. (See

    by Randal L. Schwartz and Tom Phoenix ISBN 0-596-00132-0 Third Edition, published July 2001. (See the catalog page for this book.) Learning Perl, 3rd Edition. Table of Contents Copyright Page Preface Chapter 1: Introduction Chapter 2: Scalar Data Chapter 3: Lists and Arrays Chapter 4: Subroutines Chapter 5: Hashes Chapter 6: I/O Basics Chapter 7: Concepts of Regular Expressions Chapter 8: More About Regular Expressions Chapter 9: Using Regular Expressions Chapter 10: More Control Structures Chapter 11: Filehandles and File Tests Chapter 12: Directory Operations Chapter 13: Manipulating Files and Directories Chapter 14: Process Management Chapter 15: Strings and Sorting Chapter 16: Simple Databases Chapter 17: Some Advanced Perl Techniques Appendix A: Exercise Answers Appendix B: Beyond the Llama Index Colophon

    標簽: L. published Schwartz Edition

    上傳時間: 2015-09-03

    上傳用戶:lifangyuan12

  • 一個由Mike Gashler完成的機器學習方面的includes neural net, naive bayesian classifier, decision tree, KNN, a genet

    一個由Mike Gashler完成的機器學習方面的includes neural net, naive bayesian classifier, decision tree, KNN, a genetic algorithm, and some manifold learning algorithms.

    標簽: classifier includes bayesian decision

    上傳時間: 2015-09-11

    上傳用戶:gaome

  • Verilog and VHDL狀態機設計

    Verilog and VHDL狀態機設計,英文pdf格式 State machine design techniques for Verilog and VHDL Abstract : Designing a synchronous finite state Another way of organizing a state machine (FSM) is a common task for a digital logic only one logic block as shown in engineer. This paper will discuss a variety of issues regarding FSM design using Synopsys Design Compiler . Verilog and VHDL coding styles will be 2.0 Basic HDL coding presented. Different methodologies will be compared using real-world examples.

    標簽: Verilog VHDL and 狀態

    上傳時間: 2013-12-19

    上傳用戶:change0329

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