The Virtex-4 features, such as the programmable IDELAY and built-in FIFO support, simplifythe bridging of a high-speed, PCI-X core to large amounts of DDR-SDRAM memory. Onechallenge is meeting the PCI-X target initial latency specification. PCI-X Protocol Addendum tothe PCI Local Bus Specification Revision 2.0a ([Ref 6]) dictates that when a target signals adata transfer, "the target must do so within 16 clocks of the assertion of FRAME#." PCItermination transactions, such as Split Response/Complete, are commonly used to meet thelatency specifications. This method adds complexity to the design, as well as additional systemlatency. Another solution is to increase the ratio of the memory frequency to the PCI-X busfrequency. However, this solution increases the required power and clock resource usage.
標(biāo)簽:
PCI-X
XAPP
DIMM
708
上傳時間:
2013-11-24
上傳用戶:18707733937
三菱FX-PLC 的通訊協(xié)議參考(含有源碼):三菱FX 系列PLC 專用協(xié)議通信指令一覽FX 系列PLC 專用協(xié)議通信指令一覽以下將詳細(xì)列出PLC 專用協(xié)議通信的指令指令 注釋BR 以1 點(diǎn)為單位,讀出位元件的狀態(tài)WR 以16 點(diǎn)為單位,讀出位元件的狀態(tài),或以1 字為單位讀出字元件的值BW 以1 點(diǎn)為單位,寫入位元件的狀態(tài)WW 以16 點(diǎn)為單位,寫入位元件的狀態(tài)或以1 字為單位寫入值到字元件BT 以1 點(diǎn)為單位,SET/RESET 位元件WT 以16 點(diǎn)為單位,SET/RESET 位元件,或?qū)懭胫档阶衷R 控制PLC 運(yùn)行RUNRS 控制PLC 停止STOPPC 讀出PLC 設(shè)備類型TT 連接測試注:位元件包括X,Y,M,S 以及T,C 的線圈等字元件包括D,T,C,KnX,KnY,KnM 等。
標(biāo)簽:
FX-PLC
三菱
通訊協(xié)議
有源
上傳時間:
2015-01-02
上傳用戶:gdgzhym