一個(gè)簡(jiǎn)單的ＳＰＩ ＩＰ核，SPI Core Specifications 可以從說(shuō)明文檔中找到！
The simple Serial Peripheral Interface core is an enhanced version of the Serial Peripheral Interface found on Motorola s M68HC11 family of CPUs. The Serial Peripheral Interface is a serial, synchronous communication protocol that requires a minimum of 3 wires.
FEATURES:
· Compatible with Motorola’s SPI specifications
· Enhanced M68HC11 Serial Peripheral Interface
· 4 entries deep read FIFO
· 4 entries deep write FIFO
· Interrupt generation after 1, 2, 3, or 4 transferred bytes
· 8 bit WISHBONE RevB.3 Classic interface
· Operates from a wide range of input clock frequencies
· Static synchronous design
· Fully synthesizable
標(biāo)簽：
上傳時(shí)間：
2015-09-17
上傳用戶：TRIFCT
