The MC68HC05K0 is a low cost, low pin countsingle chip microcomputer with 504 bytes of userROM and 32 bytes of RAM. The MC68HC05K0 isa member of the 68HC05K series of devices whichare available in 16-pin DIL or SOIC packages.It uses the same CPU as the other devices in the68HC05 family and has the same instructions andregisters. Additionally, the device has a 15-stagemulti-function timer and 10 general purposebi-directional I/0 lines. A mask option is availablefor software programmable pull-downs on all ofthe I/O pins and four of the pins are capable ofgenerating interrupts.The device is ideally suited for remote-controlkeyboard applications because the pull-downs andthe interrupt drivers on the port pins allowkeyboards to be built without any externalcomponents except the keys themselves. There isno need for external pull-up or pull-down resistors,or diodes for wired-OR interrupts, as these featuresare already designed into the device.
標(biāo)簽： Infra-red Remote Cont 05K
上傳時間： 2014-01-24
上傳用戶：zl5712176
當(dāng)拿到一張CASE單時，首先得確定的是能用什么母體才能實現(xiàn)此功能，然后才能展開對外圍硬件電路的設(shè)計，因此首先得了解每個母體的基本功能及特點，下面大至的介紹一下本公司常用的IC：單芯片解決方案• SN8P1900 系列– 高精度 16-Bit 模數(shù)轉(zhuǎn)換器– 可編程運算放大器 (PGIA)• 信號放大低漂移: 2V• 放大倍數(shù)可編程: 1/16/64/128 倍– 升壓- 穩(wěn)壓調(diào)節(jié)器 (Charge-Pump Regulator)• 電源輸入: 2.4V ~ 5V• 穩(wěn)壓輸出: e.g. 3.8V at SN8P1909– 內(nèi)置液晶驅(qū)動電路 (LCD Driver)– 單芯片解決方案 • 耳溫槍 SN8P1909 LQFP 80 Pins• 5000 解析度量測器 SN8P1908 LQFP 64 Pins• 體重計 SN8P1907 SSOP 48 Pins單芯片解決方案• SN8P1820 系列– 精確的12-Bit 模數(shù)轉(zhuǎn)換器– 可編程運算放大器 (PGIA)• Gain Stage One: Low Offset 5V, Gain: 16/32/64/128• Gain Stage One: Low Offset 2mV, Gain: 1.3 ~ 2.5– 升壓- 穩(wěn)壓調(diào)節(jié)器• 電源輸入: 2.4V ~ 5V• 穩(wěn)壓輸出: e.g. 3.8V at SN8P1829– 內(nèi)置可編程運算放大電路– 內(nèi)置液晶驅(qū)動電路 – 單芯片解決方案 • 電子醫(yī)療器 SN8P1829 LQFP 80 Pins 高速/低功耗/高可靠性微控制器• 最新SN8P2000 系列– SN8P2500/2600/2700 系列– 高度抗交流雜訊能力• 標(biāo)準(zhǔn)瞬間電壓脈沖群測試 (EFT): IEC 1000-4-4• 雜訊直接灌入芯片電源輸入端• 只需添加1顆 2.2F/50V 旁路電容• 測試指標(biāo)穩(wěn)超 4000V (歐規(guī))– 高可靠性復(fù)位電路保證系統(tǒng)正常運行• 支持外部復(fù)位和內(nèi)部上電復(fù)位• 內(nèi)置1.8V 低電壓偵測可靠復(fù)位電路• 內(nèi)置看門狗計時器保證程序跳飛可靠復(fù)位– 高抗靜電/栓鎖效應(yīng)能力– 芯片工作溫度有所提高: -200C ~ 700C 工規(guī)芯片溫度： -400C ~ 850C 高速/低功耗/高可靠性微控制器• 最新 SN8P2000 系列– SN8P2500/2600/2700 系列– 1T 精簡指令級結(jié)構(gòu)• 1T: 一個外部振蕩周期執(zhí)行一條指令• 工作速度可達(dá)16 MIPS / 16 MHz Crystal– 工作消耗電流 < 2mA at 1-MIPS/5V– 睡眠模式下消耗電流 < 1A / 5V額外功能• 高速脈寬調(diào)制輸出 (PWM)– 8-Bit PWM up to 23 KHz at 12 MHz System Clock– 6-Bit PWM up to 93 KHz at 12 MHz System Clock– 4-Bit PWM up to 375 KHz at 12 MHz System Clock• 內(nèi)置高速16 MHz RC振蕩器 (SN8P2501A)• 電壓變化喚醒功能• 可編程控制沿觸發(fā)/中斷功能– 上升沿 / 下降沿 / 雙沿觸發(fā)• 串行編程接口
上傳時間： 2013-10-21
上傳用戶：jiahao131
全遙控6聲道AV機的匯編程序:;;;;;;;;;;;;;;;;;;;6CH AMPLIFIER;;;;;;;;;;;;;;;;;----腳位定義-----;;;;;;;;;;;;;;;;;;;6CH AMPLIFIER;;;;;;;;;;;;;;;;;----腳位定義----- PT6311_CLK EQU P3.4PT6311_STB EQU P3.5PT6311_DATA EQU P3.3 UP EQU P3.1DOEN EQU P3.0 PT2313_DATA EQU P0.7PT2313_CLK EQU P2.7 AC3 EQU P2.6 ;(控制4053的信號) M62429_DA EQU P2.3 ;(SURL/R)M62429_CK EQU P2.4 M62429_CK1 EQU P2.5 ;(C/BW) M62429_CK3 EQU P0.0 ;(ECHO,MVOL)M62429_DA3 EQU P1.7M_DELAY1 EQU P0.1M_DELAY2 EQU P0.2 AD_OUT BIT P0.5AD_IN BIT P0.6 ;----片內(nèi)RAM定義--------GIF_SIGN EQU 40H ; 動畫進程標(biāo)記(=1,走過場字幕 )GIF_TIME1 EQU 41H ; 動畫跑字的時間間隔速度GIF_LONG EQU 42H ; 動畫字幕的長度 DISP_BUFFER EQU 43H ; 顯示緩沖區(qū)地址指針DISP_INDEX EQU 44H ; PT6311片內(nèi)地址指針
上傳時間： 2013-10-19
上傳用戶：fac1003
系統(tǒng)start-up 定時器• 為了讓振蕩器能夠穩(wěn)定起振所需要的延時時間。• 其時間為1024 個振蕩器振蕩周期。制程和溫度漂移• 因RC 振蕩器的頻率與內(nèi)建振蕩電容值有關(guān)，而此電容值與制程參數(shù)有關(guān)，所以不同的MCU 會表現(xiàn)出不一致性。在固定電壓和溫度下，振蕩頻率漂移范圍約±25%。• 對于同一顆MCU(與制程漂移無關(guān))，其振蕩頻率會對工作電壓和工作溫度產(chǎn)生漂移。其對工作電壓和工作溫度所產(chǎn)生的漂移，可參考HOLTEK 網(wǎng)站上提供的相關(guān)資料。EMI/EMS(EMC)注意事項• ROSC 位置應(yīng)盡量接近OSC1 引腳，其至OSC1 的連線應(yīng)最短。• CS 可以提高振蕩器的抗干擾能力，其與MCU OSC1 和GND 的連線應(yīng)最短。• RPU 在確定系統(tǒng)頻率之后，量產(chǎn)時建議不要接，因為其fSYS/4 頻率輸出會干擾到OSC1
上傳時間： 2014-01-20
上傳用戶：yyyyyyyyyy
典型的MCU/DSP/UP復(fù)位電源監(jiān)控，外部看門狗專用電路。
上傳時間： 2013-10-11
上傳用戶：LANCE
The PL2303 USB to Serial adapter is your smart and convenient accessory forconnecting RS-232 serial devices to your USB-equipped Windows host computer. Itprovides a bridge connection with a standard DB 9-pin male serial port connector inone end and a standard Type-A USB plug connector on the other end. You simplyattach the serial device onto the serial port of the cable and plug the USB connectorinto your PC USB port. It allows a simple and easy way of adding serial connectionsto your PC without having to go thru inserting a serial card and traditional portconfiguration.This USB to Serial adapter is ideal for connecting modems, cellular phones, PDAs,digital cameras, card readers and other serial devices to your computer. It providesserial connections up to 1Mbps of data transfer rate. And since USB does not requireany IRQ resource, more devices can be attached to the system without the previoushassles of device and resource conflicts.Finally, the PL-2303 USB to Serial adapter is a fully USB Specification compliantdevice and therefore supports advanced power management such as suspend andresume operations as well as remote wakeup. The PL-2303 USB Serial cable adapteris designed to work on all Windows operating systems.
標(biāo)簽： Adapter Serial 2303 USB
上傳時間： 2013-11-01
上傳用戶：ghostparker
CCStudio Platinum Edition is available in a number of ways. Existingcustomers who are up-to-date with their subscription service withTexas Instruments will receive their update automatically on a CD inthe mail. New customers who wish to purchase a copy of CCStudioPlatinum Edition can order TMDSCCSALL-1 starting May 23, 2005. A120-day Trial version will be also be available on CDROM startingJuly 11, 2005. Users may order the CDROM of the 120-day free copy
上傳時間： 2014-12-28
上傳用戶：gououo
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標(biāo)簽： UltraScale Xilinx 架構(gòu)
上傳時間： 2013-11-13
上傳用戶：瓦力瓦力hong
Designing withProgrammable Logicin an Analog WorldProgrammable logic devicesrevolutionized digital design over 25years ago, promising designers a blankchip to design literally any functionand program it in the field. PLDs canbe low-logic density devices that usenonvolatile sea-of-gates cells calledcomplex programmable logic devices(CPLDs) or they can be high-densitydevices based on SRAM look-up tables
標(biāo)簽： Solutions Analog Xilinx FPGAs
上傳時間： 2013-11-01
上傳用戶：a67818601
Designing withProgrammable Logicin an Analog WorldProgrammable logic devices revolutionizeddigital design over 25 years ago,promising designers a blank chip todesign literally any function and programit in the field. PLDs can be low-logicdensity devices that use nonvolatilesea-of-gates cells called complexprogrammable logic devices (CPLDs)or they can be high-density devicesbased on SRAM look-up tables (LUTs)
標(biāo)簽： Solutions Analog Altera FPGAs
上傳時間： 2013-11-08
上傳用戶：蟲蟲蟲蟲蟲蟲
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