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  • 簡單的多輸出范圍16位DAC設計

      Precision 16-bit analog outputs with softwareconfigurableoutput ranges are often needed in industrialprocess control equipment, analytical and scientificinstruments and automatic test equipment. In the past,designing a universal output module was a daunting taskand the cost and PCB real estate associated with thisfunction were problematic, if not prohibitive.

    標簽: DAC 輸出范圍

    上傳時間: 2014-12-23

    上傳用戶:如果你也聽說

  • 意法半導體運放穩定性

      Who has never experienced oscillations issues when using an operational amplifier? Opampsare often used in a simple voltage follower configuration. However, this is not the bestconfiguration in terms of capacitive loading and potential risk of oscillations.Capacitive loads have a big impact on the stability of operational amplifier-basedapplications. Several compensation methods exist to stabilize a standard op-amp. Thisapplication note describes the most common ones, which can be used in most cases.The general theory of each compensation method is explained, and based on this, specific

    標簽: 半導體 運放 穩定性

    上傳時間: 2013-10-28

    上傳用戶:chenbhdt

  • DAC技術用語 (D/A Converters Defini

    Differential Nonlinearity: Ideally, any two adjacent digitalcodes correspond to output analog voltages that are exactlyone LSB apart. Differential non-linearity is a measure of theworst case deviation from the ideal 1 LSB step. For example,a DAC with a 1.5 LSB output change for a 1 LSB digital codechange exhibits 1⁄2 LSB differential non-linearity. Differentialnon-linearity may be expressed in fractional bits or as a percentageof full scale. A differential non-linearity greater than1 LSB will lead to a non-monotonic transfer function in aDAC.Gain Error (Full Scale Error): The difference between theoutput voltage (or current) with full scale input code and theideal voltage (or current) that should exist with a full scale inputcode.Gain Temperature Coefficient (Full Scale TemperatureCoefficient): Change in gain error divided by change in temperature.Usually expressed in parts per million per degreeCelsius (ppm/°C).Integral Nonlinearity (Linearity Error): Worst case deviationfrom the line between the endpoints (zero and full scale).Can be expressed as a percentage of full scale or in fractionof an LSB.LSB (Lease-Significant Bit): In a binary coded system thisis the bit that carries the smallest value or weight. Its value isthe full scale voltage (or current) divided by 2n, where n is theresolution of the converter.Monotonicity: A monotonic function has a slope whose signdoes not change. A monotonic DAC has an output thatchanges in the same direction (or remains constant) for eachincrease in the input code. the converse is true for decreasing codes.

    標簽: Converters Defini DAC

    上傳時間: 2013-10-30

    上傳用戶:stvnash

  • ADC轉換器技術用語 (A/D Converter Defi

    ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.

    標簽: Converter Defi ADC 轉換器

    上傳時間: 2013-11-12

    上傳用戶:pans0ul

  • 使用時鐘PLL的源同步系統時序分析

    使用時鐘PLL的源同步系統時序分析一)回顧源同步時序計算Setup Margin = Min Clock Etch Delay – Max Data Etch Delay – Max Delay Skew – Setup TimeHold Margin = Min Data Etch Delay – Max Clock Etch Delay + Min Delay Skew + Data Rate – Hold Time下面解釋以上公式中各參數的意義:Etch Delay:與常說的飛行時間(Flight Time)意義相同,其值并不是從仿真直接得到,而是通過仿真結果的后處理得來。請看下面圖示:圖一為實際電路,激勵源從輸出端,經過互連到達接收端,傳輸延時如圖示Rmin,Rmax,Fmin,Fmax。圖二為對應輸出端的測試負載電路,測試負載延時如圖示Rising,Falling。通過這兩組值就可以計算得到Etch Delay 的最大和最小值。

    標簽: PLL 時鐘 同步系統 時序分析

    上傳時間: 2013-11-05

    上傳用戶:VRMMO

  • PCIe Trusted Configuration Spa

    TCS ECN Background & Key TermsTrust Issues with PCIe PlatformsTCS ECN DetailsTrusted Config Space and TCS TransactionsTrusted Config Access Mech (TCAM)Standard vs Trusted Config AccessNew Capability StructuresTCS Support in Root Ports, Switches, & BridgesTCS “Does not…” ListExample Trusted Computing PlatformRevisiting the Trust IssuesKey Takeaways/Call to ActionQuestions

    標簽: Configuration Trusted PCIe Spa

    上傳時間: 2013-11-21

    上傳用戶:hsfei8

  • 高速數字系統設計下載pdf

    高速數字系統設計下載pdf:High-Speed Digital SystemDesign—A Handbook ofInterconnect Theory and DesignPracticesStephen H. HallGarrett W. HallJames A. McCallA Wiley-Interscience Publication JOHN WILEY & SONS, INC.New York • Chichester • Weinheim • Brisbane • Singapore • TorontoCopyright © 2000 by John Wiley & Sons, Inc.speeddigital systems at the platform level. The book walks the reader through everyrequired concept, from basic transmission line theory to digital timing analysis, high-speedmeasurement techniques, as well as many other topics. In doing so, a unique balancebetween theory and practical applications is achieved that will allow the reader not only tounderstand the nature of the problem, but also provide practical guidance to the solution.The level of theoretical understanding is such that the reader will be equipped to see beyondthe immediate practical application and solve problems not contained within these pages.Much of the information in this book has not been needed in past digital designs but isabsolutely necessary today. Most of the information covered here is not covered in standardcollege curricula, at least not in its focus on digital design, which is arguably one of the mostsignificant industries in electrical engineering.The focus of this book is on the design of robust high-volume, high-speed digital productssuch as computer systems, with particular attention paid to computer busses. However, thetheory presented is applicable to any high-speed digital system. All of the techniquescovered in this book have been applied in industry to actual digital products that have beensuccessfully produced and sold in high volume.Practicing engineers and graduate and undergraduate students who have completed basicelectromagnetic or microwave design classes are equipped to fully comprehend the theorypresented in this book. At a practical level, however, basic circuit theory is all thebackground required to apply the formulas in this book.

    標簽: 高速數字 系統設計

    上傳時間: 2013-10-26

    上傳用戶:縹緲

  • 射頻集成電路設計John Rogers(Radio Freq

    Radio Frequency Integrated Circuit Design I enjoyed reading this book for a number of reasons. One reason is that itaddresses high-speed analog design in the context of microwave issues. This isan advanced-level book, which should follow courses in basic circuits andtransmission lines. Most analog integrated circuit designers in the past workedon applications at low enough frequency that microwave issues did not arise.As a consequence, they were adept at lumped parameter circuits and often notcomfortable with circuits where waves travel in space. However, in order todesign radio frequency (RF) communications integrated circuits (IC) in thegigahertz range, one must deal with transmission lines at chip interfaces andwhere interconnections on chip are far apart. Also, impedance matching isaddressed, which is a topic that arises most often in microwave circuits. In mycareer, there has been a gap in comprehension between analog low-frequencydesigners and microwave designers. Often, similar issues were dealt with in twodifferent languages. Although this book is more firmly based in lumped-elementanalog circuit design, it is nice to see that microwave knowledge is brought inwhere necessary.Too many analog circuit books in the past have concentrated first on thecircuit side rather than on basic theory behind their application in communications.The circuits usually used have evolved through experience, without asatisfying intellectual theme in describing them. Why a given circuit works bestcan be subtle, and often these circuits are chosen only through experience. Forthis reason, I am happy that the book begins first with topics that require anintellectual approach—noise, linearity and filtering, and technology issues. Iam particularly happy with how linearity is introduced (power series). In therest of the book it is then shown, with specific circuits and numerical examples,how linearity and noise issues arise.

    標簽: Rogers Radio John Freq

    上傳時間: 2014-12-23

    上傳用戶:han_zh

  • Design Safe Verilog State Machine(Synplicity)

      One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability analysis to determine all the states that could possibly bereached, and optimize away all states and transition logic that can not be reached.Thus, producing a highly optimal final implementation of the state machine.

    標簽: Synplicity Machine Verilog Design

    上傳時間: 2013-10-23

    上傳用戶:司令部正軍級

  • Creating Safe State Machines(Mentor)

      Finite state machines are widely used in digital circuit designs. Generally, when designing a state machine using an HDL, the synthesis tools will optimize away all states that cannot be reached and generate a highly optimized circuit. Sometimes, however, the optimization is not acceptable. For example, if the circuit powers up in an invalid state, or the circuit is in an extreme working environment and a glitch sends it into an undesired state, the circuit may never get back to its normal operating condition.

    標簽: Creating Machines Mentor State

    上傳時間: 2013-10-08

    上傳用戶:wangzhen1990

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