中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽： UltraScale Xilinx 架構
上傳時間： 2013-11-13
上傳用戶：瓦力瓦力hong
針對飛行模擬器座艙數據采集的復雜性，設計了一種基于以太網分布式的數據采集控制系統，該系統是RCM5700微處理器模塊上的以太網應用。在系統的基礎上具體討論了PoE技術的應用，在傳輸數據的網線上同時提供電流，提出并實現了一種包括輔助電源在內的完整可靠的PoE供電方案。設計采用美國國家半導體的LM5073和LM5576并根據不同的負載情況，進行穩定可靠的電壓轉換，以滿足數據采集電路的要求。實驗結果表明：該設計穩定可靠，滿足低于13 W的采集節點供電要求，提高了模擬器信號采集系統的通用性和標準化程度，避免了以往數據采集節點單獨繁瑣的電源設計。 Abstract: Aiming at the complexity of large avion simulation and controlling，the simulator cabin distribute data collecting and control system was designed. This system is the application of RCM5700 on Ethernet. Based on this system，PoE technique that makes Ethernet can also provide power were expounded with emphasis and included FAUX design the PoE resolution was realized. To achieve the requirement of this system，LM5073 and LM5576 were used to DC-DC switch. From the data of experiment，the design filled the requirement of power-need of node whose power was lower than 13W. The application of the technique can advance the degree of simulation data collections currency and standardization and avoid designing additional power system.
上傳時間： 2013-11-09
上傳用戶：xyipie
ExpressPCB 是一款免費的PCB設計軟件，簡單實使。可以畫雙層板。 Our Free PCB software is a snap to learn and use. For the first time, designing circuit boards is simple for the beginner and efficient for the professional. Our board manufacturing service makes top quality two and four layer PCBs. Use our MiniBoard service and pay only $51 for three boards (plus $8 shipping).
標簽： ExpressPCB PCB 設計軟件
上傳時間： 2013-11-15
上傳用戶：lchjng
ExpressPCB 是一款免費的PCB設計軟件，簡單實使。可以畫雙層板。 Our Free PCB software is a snap to learn and use. For the first time, designing circuit boards is simple for the beginner and efficient for the professional. Our board manufacturing service makes top quality two and four layer PCBs. Use our MiniBoard service and pay only $51 for three boards (plus $8 shipping).
標簽： ExpressPCB PCB 設計軟件
上傳時間： 2013-10-09
上傳用戶：1047385479
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽： UltraScale Xilinx 架構
上傳時間： 2013-11-21
上傳用戶：wxqman
We would like to welcome you as a user of the Allegro CX, a rugged, handheld fi eld PC for data collection. Developed with the input of data collection professionals worldwide, the Allegro CX is adaptable and versatile for use in a wide variety of data collection environments. The Allegro CX continues to utilize our ergonomic, lightweight design that is standard in our line of Allegro Field PCs. This design makes your Allegro easy to use for extended periods while moving to and from data collection sites in the fi eld.
上傳時間： 2015-01-02
上傳用戶：zhangyi99104144
vs.lib is a math library in C++ with a set of linear algebra and integrable / differentiable objects. vs.lib is a rapid-proto-typing tool which makes programming in numerical applications as easy as writing mathematical expressions.
標簽： differentiable integrable algebra library
上傳時間： 2015-03-03
上傳用戶：PresidentHuang
The module LSQ is for unconstrained linear least-squares fitting. It is based upon Applied Statistics algorithm AS 274 (see comments at the start of the module). A planar-rotation algorithm is used to update the QR- factorization. This makes it suitable for updating regressions as more data become available. The module contains a test for singularities which is simpler and quicker than calculating the singular-value decomposition. An important feature of the algorithm is that it does not square the condition number. The matrix X X is not formed. Hence it is suitable for ill- conditioned problems, such as fitting polynomials. By taking advantage of the MODULE facility, it has been possible to remove many of the arguments to routines. Apart from the new function VARPRD, and a back-substitution routine BKSUB2 which it calls, the routines behave as in AS 274.
標簽： least-squares unconstrained Statisti Applied
上傳時間： 2015-05-14
上傳用戶：aig85
Although there has been a lot of AVL tree libraries available now, nearly all of them are meant to work in the random access memory(RAM). Some of them do provide some mechanism for dumping the whole tree into a file and loading it back to the memory in order to make data in that tree persistent. It serves well when there s just small amount of data. When the tree is somewhat bigger, the dumping/loading process could take a lengthy time and makes your mission-critical program less efficient. How about an AVL tree that can directly use the disk for data storage ? If there s something like that, we won t need to read through the whole tree in order to pick up just a little bit imformation(a node), but read only the sectors that are neccssary for locating a certain node and the sectors in which that node lies. This is my initial motivation for writing a storage-media independent AVL Tree. However, as you step forth, you would find that it not only works fine with disks but also fine with memorys, too.
標簽： available libraries Although nearly
上傳時間： 2014-01-22
上傳用戶：zhoujunzhen
Expert Choice represents a significant contribution to the decision making process 工t assists a decision maker in solving complex problems involving many criteria and several courses of action . An Expert Choice solution to a problem reflects the expertise of the decision maker , not the computer . Behavioral scientists have spent many years studying the human mind and how it makes decisions . They have found that humans are influenced by their previous experiences and this causes them to have biases . Basic instincts , preferences and environmental factors also play key roles in how we analyze data and make decisions . There 15 way to remove these factors from human decision making , nor would we necessarily want to , but as the problems of our world become more and more complex , it 15 necessary for us to employ a framework to help make more logical and less biased decisions while still taking our feelings and intuition into consideration .
標簽： contribution significant represents decision
上傳時間： 2015-06-02
上傳用戶：gmh1314
