This paper presents several low-latency mixed-timing FIFO (first-in–first-out) interfaces designs that interface systems on a chip working at different speeds. The connected systems can be either synchronous or asynchronous. The designs are then adapted to work between systems with very long interconnect delays, by migrating a single-clock solution by Carloni et al. (1999, 2000, and 2001) (for “latency-insensitive” protocols) to mixed-timing domains. The new designs can be made arbitrarily robust with regard to metastability and interface operating speeds. Initial simulations for both latency and throughput are promising.
標簽： mixed-timing low-latency interfaces first-out
上傳時間： 2015-10-08
上傳用戶：dapangxie
Using the Dynamic Power Management Functionality of the ADSP-BF535 Blackfin® Processor
標簽： Functionality Management Processor the
上傳時間： 2015-10-14
上傳用戶：CSUSheep
低成本電子羅盤DataSheet規格書資料。REFERENCE DESIGN: LOW COST COMPASS； Honeywell SENSOR PRODUCTS
標簽： DataSheet REFERENCE Honeywell PRODUCTS
上傳時間： 2014-12-06
上傳用戶：helmos
Power frequency harmonic measurement using integer periodic extension method
標簽： measurement frequency extension harmonic
上傳時間： 2015-10-17
上傳用戶：大三三
dynatic power management example code for BF5
標簽： management dynatic example power
上傳時間： 2014-01-26
上傳用戶：zhangyi99104144
wince 5.0 set power status procedure
標簽： procedure status wince power
上傳時間： 2013-12-17
上傳用戶：miaochun888
power pcb 5.0 破解
上傳時間： 2015-11-01
上傳用戶：從此走出陰霾
samsung推出的s3c2410 soc(可以說是公板)芯片的完整測試代碼(官方),外圍設備包括ADC,Timer,RTC,IIC,IIS,SPI以及系統的DMA,PLL,Power等.對需要寫soc芯片底層驅動的朋友比較有幫助
標簽： samsung s3c2410 Timer Power
上傳時間： 2013-12-18
上傳用戶：lyy1234
A translator that converts Qt Designer UI files into SWT java classes. Use the power of Qt Designer to generate your user interface and then automatically generate SWT java source code.
標簽： Designer translator converts classes
上傳時間： 2014-10-30
上傳用戶：zhanditian
IO重定向、PNP和POWER重定向,主要介紹驅動開發中IRP_MJ_CREATE的重定向問題.
標簽： IRP_MJ_CREATE POWER 定向 PNP
上傳時間： 2015-11-10
上傳用戶：gououo
