synchronization of a class of fractional order equations
標(biāo)簽： synchronization fractional equations class
上傳時間： 2014-01-20
上傳用戶：evil
The document describes the theory of fractional Delay Filters. 3 methods of designing fractional delay filters are covered in detail.
標(biāo)簽： fractional fractional describes designing
上傳時間： 2014-01-11
上傳用戶：Ants
The MAX2870 ultra-wideband phase-locked loop (PLL) and voltagecontrol oscillator (VCO) can operate in both integer-N and fractional-Nmodes, similar to the Analog Devices ADF4350 wideband synthesizer.This application note compares the MAX2870 and ADF4350 registers andloop filter design in detail. Users who already familiar with ADF4350 canuse this application note as a quick design reference.
標(biāo)簽： 寄存器 環(huán)路濾波器
上傳時間： 2014-12-23
上傳用戶：變形金剛
Differential Nonlinearity: Ideally, any two adjacent digitalcodes correspond to output analog voltages that are exactlyone LSB apart. Differential non-linearity is a measure of theworst case deviation from the ideal 1 LSB step. For example,a DAC with a 1.5 LSB output change for a 1 LSB digital codechange exhibits 1⁄2 LSB differential non-linearity. Differentialnon-linearity may be expressed in fractional bits or as a percentageof full scale. A differential non-linearity greater than1 LSB will lead to a non-monotonic transfer function in aDAC.Gain Error (Full Scale Error): The difference between theoutput voltage (or current) with full scale input code and theideal voltage (or current) that should exist with a full scale inputcode.Gain Temperature Coefficient (Full Scale TemperatureCoefficient): Change in gain error divided by change in temperature.Usually expressed in parts per million per degreeCelsius (ppm/°C).Integral Nonlinearity (Linearity Error): Worst case deviationfrom the line between the endpoints (zero and full scale).Can be expressed as a percentage of full scale or in fractionof an LSB.LSB (Lease-Significant Bit): In a binary coded system thisis the bit that carries the smallest value or weight. Its value isthe full scale voltage (or current) divided by 2n, where n is theresolution of the converter.Monotonicity: A monotonic function has a slope whose signdoes not change. A monotonic DAC has an output thatchanges in the same direction (or remains constant) for eachincrease in the input code. the converse is true for decreasing codes.
標(biāo)簽： Converters Defini DAC
上傳時間： 2013-10-30
上傳用戶：stvnash
設(shè)計一種基于P89V51RD2的功率因數(shù)測量儀，采用光電隔離器和專用數(shù)碼管驅(qū)動器。該測量儀是以增強型單片機P89V51RD2為核心，大大簡化系統(tǒng)硬件設(shè)計。而軟件部分采用模塊化設(shè)計思想，采用中值濾波和小數(shù)補償算法，實現(xiàn)功率因數(shù)的高精度測量。實驗測試表明，該功率因數(shù)測量儀測量精度高，運行穩(wěn)定可靠。 Abstract: A power－factor measurement instrument based on P89V51RD2is designed，which uses optical coupler and specific LED drive chip.The power factor measurement instrument uses P89V51RD2as a core of which greatly simplifies the system design.Furthermore，modularization software is developed in detail.The high precision power－factor measuring system is realized by the center value filter and fractional compensation algorithm.Experiments manifests that the power－ factor measurement instrument is high precision，steady and reliable.
上傳時間： 2014-12-27
上傳用戶：CHINA526
Fractal Explorer GUI-based program for exploring and studying the most common form of fractals, chaotic systems and fractional dimension systems
標(biāo)簽： GUI-based exploring Explorer fractals
上傳時間： 2013-11-25
上傳用戶：ljmwh2000
經(jīng)典分數(shù)階傅立葉變換，土耳其算法（The fast fractional Fourier Transform）
上傳時間： 2014-01-21
上傳用戶：李彥東
Abstract: A sliding mode observer and fractional-order phase-locked loop (FO-PLL) method is proposed for the sensorless speed control of a permanent magnet synchronous motor (PMSM).The saturation function is adopted in order to reduce the chattering phenomenon caused by the sliding mode observer. In this proposed FO-PLL, method, a regulable fractional order r is involved, which means that the FO-PLL provides an extra degree of freedom. In fact, the conventional phase-locked loop (PLL) applied in sensorless PMSM control can be seen as a special case of the proposed FO-PLL. By selecting a proper fractional order r a better performance may be achieved. The computer simulation results demonstrate the effectiveness of the proposed method.Key words: fractional calculus; fractional order phase-locked loop; sensorless control; sliding mode observer; permanent magnet synchronous motor; speed controll
上傳時間： 2022-06-18
上傳用戶：
分數(shù)階微積分（fractional Calculus）作為微積分的一條分支在三百多年的發(fā)展歷程中已經(jīng)逐步形成自己特有的體系，在很多的領(lǐng)域中已經(jīng)顯示出獨特的處理能力，尤其是在電磁學(xué)、化學(xué)、控制學(xué)和力學(xué)等一些學(xué)科得到了廣泛的應(yīng)用。在信息信號處理理論中，微積分作為一種基本的數(shù)學(xué)運算得到了廣泛的應(yīng)用，但其中的微積分運算都是基于整數(shù)階的，如一階微積分和二階微積分等。然而隨著科學(xué)技術(shù)與計算能力的發(fā)展，越來越多的非線性問題成為了研究的工作重點，分數(shù)階微積分在此領(lǐng)域強大的處理能力就逐步的體現(xiàn)出來。分數(shù)階微積分是相對于傳統(tǒng)的整數(shù)階微積分提出的，傳統(tǒng)的整數(shù)階微積分的運算階次都是基于整數(shù)的情況定義的，而分數(shù)階微積分是將傳統(tǒng)意義上的整數(shù)階微積分的階次從整數(shù)推廣至分數(shù)，乃至整個無理小數(shù)和分數(shù)。接下來我們先回顧下傳統(tǒng)的微積分。
上傳時間： 2022-06-25
上傳用戶：
蟲蟲下載站版權(quán)所有 京ICP備2021023401號-1
