In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All theseproblems are accompanied by an example to have a better idea, and these can be taken care off if thesecoding guidelines are followed. Discussion of all the techniques is beyond the scope of this paper, however,here we try to cover a few of them.
標簽： Efficient Verilog Digital Coding
上傳時間： 2013-11-23
上傳用戶：我干你啊
The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
標簽： Transceiver Virtex Wizar GTP
上傳時間： 2013-10-20
上傳用戶：dave520l
本文利用Verilog HDL 語言自頂向下的設(shè)計方法設(shè)計多功能數(shù)字鐘，突出了其作為硬件描述語言的良好的可讀性、可移植性和易理解等優(yōu)點，并通過Altera QuartusⅡ 4.1 和ModelSim SE 6.0 完成綜合、仿真。此程序通過下載到FPGA 芯片后，可應(yīng)用于實際的數(shù)字鐘顯示中。 關(guān)鍵詞：Verilog HDL；硬件描述語言；FPGA Abstract: In this paper, the process of designing multifunctional digital clock by the Verilog HDL top-down design method is presented, which has shown the readability, portability and easily understanding of Verilog HDL as a hard description language. Circuit synthesis and simulation are performed by Altera QuartusⅡ 4.1 and ModelSim SE 6.0. The program can be used in the truly digital clock display by downloading to the FPGA chip. Keywords: Verilog HDL；hardware description language；FPGA
上傳時間： 2013-11-10
上傳用戶：hz07104032
解壓密碼：www.elecfans.com 隨著微電子技術(shù)的迅速發(fā)展以及集成電路規(guī)模不斷提高，對電路性能的設(shè)計 要求越來越嚴格，這勢必對用于大規(guī)模集成電路設(shè)計的EDA 工具提出越來越高的 要求。自1972 年美國加利福尼亞大學(xué)柏克萊分校電機工程和計算機科學(xué)系開發(fā) 的用于集成電路性能分析的電路模擬程序SPICE（Simulation Program with IC Emphasis）誕生以來，為適應(yīng)現(xiàn)代微電子工業(yè)的發(fā)展，各種用于集成電路設(shè)計的 電路模擬分析工具不斷涌現(xiàn)。HSPICE 是Meta-Software 公司為集成電路設(shè)計中 的穩(wěn)態(tài)分析，瞬態(tài)分析和頻域分析等電路性能的模擬分析而開發(fā)的一個商業(yè)化通 用電路模擬程序，它在柏克萊的SPICE（1972 年推出），MicroSim公司的PSPICE （1984 年推出）以及其它電路分析軟件的基礎(chǔ)上，又加入了一些新的功能，經(jīng) 過不斷的改進，目前已被許多公司、大學(xué)和研究開發(fā)機構(gòu)廣泛應(yīng)用。HSPICE 可 與許多主要的EDA 設(shè)計工具，諸如Candence,Workview 等兼容，能提供許多重要 的針對集成電路性能的電路仿真和設(shè)計結(jié)果。采用HSPICE 軟件可以在直流到高 于100MHz 的微波頻率范圍內(nèi)對電路作精確的仿真、分析和優(yōu)化。在實際應(yīng)用中， HSPICE能提供關(guān)鍵性的電路模擬和設(shè)計方案，并且應(yīng)用HSPICE進行電路模擬時， 其電路規(guī)模僅取決于用戶計算機的實際存儲器容量。 The HSPICE Integrator Program enables qualified EDA vendors to integrate their products with the de facto standard HSPICE simulator, HSPICE RF simulator, and WaveView Analyzer™. In addition, qualified HSPICE Integrator Program members have access to HSPICE integrator application programming interfaces (APIs). Collaboration between HSPICE Integrator Program members will enable customers to achieve more thorough design verification in a shorter period of time from the improvements offered by inter-company EDA design solutions.
上傳時間： 2013-10-18
上傳用戶：s363994250
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
標簽： pci PCB 設(shè)計規(guī)范
上傳時間： 2014-01-24
上傳用戶：s363994250
為了提高直接轉(zhuǎn)矩控制（DTC）系統(tǒng)定子磁鏈估計精度，降低電流、電壓測量的隨機誤差，提出了一種基于擴展卡爾曼濾波（EKF）實現(xiàn)異步電機轉(zhuǎn)子位置和速度估計的方法。擴展卡爾曼濾波器是建立在基于旋轉(zhuǎn)坐標系下由定子電流、電壓、轉(zhuǎn)子轉(zhuǎn)速和其它電機參量所構(gòu)成的電機模型上，將定子電流、定子磁鏈、轉(zhuǎn)速和轉(zhuǎn)子角位置作為狀態(tài)變量，定子電壓為輸入變量，定子電流為輸出變量，通過對磁鏈和轉(zhuǎn)速的閉環(huán)控制提高定子磁鏈的估計精度，實現(xiàn)了異步電機的無速度傳感器直接轉(zhuǎn)矩控制策略，仿真結(jié)果驗證了該方法的可行性,提高了直接轉(zhuǎn)矩的控制性能。 Abstract: In order to improve the Direct Torque Control（DTC） system of stator flux estimation accuracy and reduce the current， voltage measurement of random error， a novel method to estimate the speed and rotor position of asynchronous motor based on extended Kalman filter was introduced. EKF was based on d-p axis motor and other motor parameters （state vector: stator current， stator flux linkage， rotor angular speed and position； input: stator voltage； output: staror current). EKF was designed for stator flux and rotor speed estimation in close-loop control. It can improve the estimated accuracy of stator flux. It is possible to estimate the speed and rotor position and implement asynchronous motor drives without position and speed sensors. The simulation results show it is efficient and improves the control performance.
標簽： EKF 異步電機 直接轉(zhuǎn)矩 控制系統(tǒng)
上傳時間： 2015-01-02
上傳用戶：qingdou
在Multisim 10軟件環(huán)境下，設(shè)計一種由運算放大器構(gòu)成的精確可控矩形波信號發(fā)生器，結(jié)合系統(tǒng)電路原理圖重點闡述了各參數(shù)指標的實現(xiàn)與測試方法。通過改變RC電路的電容充、放電路徑和時間常數(shù)實現(xiàn)了占空比和頻率的調(diào)節(jié)，通過多路開關(guān)投入不同數(shù)值的電容實現(xiàn)了頻段的調(diào)節(jié)，通過電壓取樣和同相放大電路實現(xiàn)了輸出電壓幅值的調(diào)節(jié)并提高了電路的帶負載能力，可作為頻率和幅值可調(diào)的方波信號發(fā)生器。Multisim 10仿真分析及應(yīng)用電路測試結(jié)果表明，電路性能指標達到了設(shè)計要求。 Abstract: Based on Multisim 10， this paper designed a kind of rectangular-wave signal generator which could be controlled exactly composed of operational amplifier， the key point was how to implement and test the parameter indicators based on the circuit diagram. The duty and the frequency were adjusted by changing the time constant and the way of charging and discharging of the capacitor， the width of frequency was adjusted by using different capacitors provided with multiple switch， the amplitude of output voltage was adjusted by sampling voltage and using in-phase amplifier circuit，the ability of driving loads was raised， the circuit can be used as squarewave signal generator whose frequency and amplitude can be adjusted. The final simulation results of Multisim 10 and the tests of applicable circuit show that the performance indicators of the circuit meets the design requirements.
上傳時間： 2014-01-21
上傳用戶：shen007yue
Transfer Files to and from an FTP Server
標簽： Transfer Server Files from
上傳時間： 2013-12-17
上傳用戶：jing911003
ComPort Library是一套用來編寫串口通訊程序的控件。它包含5個控件：TComPort, TComDataPacket, TComComboBox, TComRadioGroup and TComLed。利用這些工具（當然還有DELPHI開發(fā)環(huán)境），你能更快更簡單地開發(fā)串口通訊程序。包含Delphi上下文相關(guān)的幫助文件和源代碼（4000行）。功能無限制。源代碼：包含。適用語言：CB3 CB4 CB5 D3 D4 D5
標簽： TComDataPacket TComRadioGroup TComComboBox TComPort
上傳時間： 2015-01-05
上傳用戶：363186
Linux PCMCIA Card Services - Linux support for PCMCIA and CardBus devices, including kernel services, client drivers, and user-level utilities.
標簽： PCMCIA Linux including Services
上傳時間： 2014-01-18
上傳用戶：tyler
蟲蟲下載站版權(quán)所有 京ICP備2021023401號-1
