Uart 4 Uart參考設計，Xilinx提供VHDL代碼 Uart_vhdl
This zip file contains the following folders:
\vhdl_source -- Source VHDL files:
Uart.vhd - top level file
txmit.vhd - transmit portion of Uart
rcvr.vhd - - receive portion of Uart
\vhdl_testfixture -- VHDL Testbench files. This files only include the testbench behavior, they
do not instantiate the DUT. This can easily be done in a top-level VHDL
file or a schematic. This folder contains the following files:
txmit_tb.vhd -- Test bench for txmit.vhd.
rcvr_tf.vhd -- Test bench for rcvr.vhd.
