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  • AT89S52-24單片機最小系統(tǒng)開發(fā)板ALTIUM設(shè)計硬件原理圖+PCB文件 2層板設(shè)計 大小為1

    AT89S52-24單片機最小系統(tǒng)開發(fā)板ALTIUM設(shè)計硬件原理圖+PCB文件,2層板設(shè)計,大小為121x149mm,Altium Designer 設(shè)計的工程文件,包括完整的原理圖及PCB文件,可以用Altium(AD)軟件打開或修改,可作為你的產(chǎn)品設(shè)計的參考。主要器件型號列表如下:Library Component Count : 14Name                Description----------------------------------------------------------------------------------------------------AT89S52-P           8 位微處理器/40引腳CAP                 CapacitorCAPACITOR POL       CapacitorCRYSTAL             CrystalD Connector 9       Receptacle Assembly, 9 Position, Right AngleHeader 2            Header, 2-PinHeader 4            Header, 4-PinHeader 5X2          Header, 5-Pin, Dual rowLED                 MAX232PZ_9                排針——9RES2SW-DPST             Double-Pole, Single-Throw SwitchSW-PB               Switch

    標(biāo)簽: at89s52 單片機

    上傳時間: 2021-11-17

    上傳用戶:

  • AT89S52單片機主8入8出繼電器工控主板ALTIUM設(shè)計硬件原理圖+PCB文件

    AT89S52單片機主8入8出繼電器工控主板ALTIUM設(shè)計硬件原理圖+PCB文件,2層板設(shè)計,大小為121x149mm,Altium Designer 設(shè)計的工程文件,包括完整的原理圖及PCB文件,可以用Altium(AD)軟件打開或修改,可作為你的產(chǎn)品設(shè)計的參考。主要器件型號列表如下:Library Component Count : 25Name                Description----------------------------------------------------------------------------------------------------24LC02AJKG                按鍵開關(guān)AT89S52-P           8 位微處理器/40引腳CAP                 CapacitorCAPACITOR POL       CapacitorCPDR                瓷片電容CRYSTAL             CrystalD Connector 9       Receptacle Assembly, 9 Position, Right AngleDG                  電感DJDR                電解電容GO                  光耦Header 5X2          Header, 5-Pin, Dual rowJDQYCK              繼電器——1常開1常閉LED                 發(fā)光二極管LM2576HVT-3.3       Simple Switcher 3A Step Down Voltage RegulatorMAX232              NPN                 NPN Bipolar TransistorPZ_2                排針——2PZ_3                排針——3RES2Res                 電阻Res PZ_8            8位排阻SW-DPST             Double-Pole, Single-Throw SwitchWY2JG               穩(wěn)壓二級管ZL2JG               整流二極管

    標(biāo)簽: at89s52 繼電器

    上傳時間: 2021-11-17

    上傳用戶:kingwide

  • CH340C+RT9013+MINI USB接口板 AD設(shè)計硬件原理圖+PCB文件 ALTIUM設(shè)計

    CH340C+RT9013+MINI USB接口板 AD設(shè)計硬件原理圖+PCB文件,ALTIUM設(shè)計的2層板設(shè)計,包括完整的原理圖和PCB文件,主要器件如下:Library Component Count : 12Name                Description----------------------------------------------------------------------------------------------------CAP                 CapacitorCC2640EM            CC2630 ModuleCH340               CH340 USB 2 UARTCON11               Connector 11pinsCON12               Connector 12pinsCON3X2              Connector 5*2LED                 LEDRES                 ResistorRT9013              RT9013 3.3VSWITCH              switch 6*6USB1                USB ConnectorsXDS110-Lte          XDS110-Lite Target Interface

    標(biāo)簽: ch340c rt9013 usb 接口 ad設(shè)計

    上傳時間: 2021-11-24

    上傳用戶:canderile

  • NCP1399 電流模式控制器 手冊

    NCP1399 是高性能電流模式控制器,半橋諧 變換器。此控制器實現(xiàn) 600 V 門驅(qū)動、 簡化布 局和減少外部組件計數(shù) 。built - in 和 Brown - Out  輸入函數(shù)簡化了執(zhí)行在所有應(yīng)用程序的控制器。 在 PFC 前階段的應(yīng)用 NCP1399 需要設(shè)有專用的 輸出驅(qū)動 PFC 前級控制器。此功能專用 skip-mode 技術(shù)進(jìn)一步提高輕負(fù)載效率的整個應(yīng) 用程序。 NCP1399 提供全套的保護(hù)功能允許安全 運行在任何應(yīng)用程序中。這包括:過載保護(hù),過 流保護(hù)以防止硬開關(guān)周期, brown- out 檢測,打 開光電耦合器檢測, 死區(qū)自動調(diào)整, 過電壓(OVP) 和 (OTP) 過溫保護(hù)

    標(biāo)簽: ncp1399 電流模式控制器

    上傳時間: 2021-12-17

    上傳用戶:qingfengchizhu

  • TMS320F28035 DSP最小核心板開發(fā)板ALTIUM設(shè)計原理圖 無PCB板圖

    TMS320F28035 DSP最小核心板開發(fā)板ALTIUM設(shè)計原理圖,無PCB板圖。原理圖已在項目中使用,包括CAN通信電路和瓷隔離電路等,可以做為你的設(shè)計參考,所用器件型號如下:ADUM1201AT24CXXBAV99               R26010005CAP                 CapacitorHeader 4            Header, 4-PinHeader 4X2          Header, 4-Pin, Dual rowINDUCTORL2                  LM317               R25040043NTC                 R27040030OPTOISORES                 R20190049RES1                SN65HVD230/SO8SW-SPST             Single-Pole, Single-Throw SwitchTL431TMS320F28035-80XTAL                Crystal Oscillator

    標(biāo)簽: tms320f28035 dsp

    上傳時間: 2021-12-22

    上傳用戶:trh505

  • DDR4標(biāo)準(zhǔn) JESD79_4

    1. Scope ......................................................................................................................................................................... 12. DDR4 SDRAM Package Pinout and Addressing ....................................................................................................... 22.1 DDR4 SDRAM Row for X4,X8 and X16 ................................................................................................................22.2 DDR4 SDRAM Ball Pitch........................................................................................................................................22.3 DDR4 SDRAM Columns for X4,X8 and X16 ..........................................................................................................22.4 DDR4 SDRAM X4/8 Ballout using MO-207......................................................................................................... 22.5 DDR4 SDRAM X16 Ballout using MO-207.............................................................................................................32.6 Pinout Description ..................................................................................................................................................52.7 DDR4 SDRAM Addressing.....................................................................................................................................73. Functional Description ...............................................................................................................................................83.1 Simplified State Diagram ....................................................................................................................................83.2 Basic Functionality..................................................................................................................................................93.3 RESET and Initialization Procedure .....................................................................................................................103.3.1 Power-up Initialization Sequence .............................................................................................................103.3.2 Reset Initialization with Stable Power ......................................................................................................113.4 Register Definition ................................................................................................................................................123.4.1 Programming the mode registers .............................................................................................................123.5 Mode Register ......................................................................................................................................................134. DDR4 SDRAM Command Description and Operation ............................................................................................. 244.1 Command Truth Table ..........................................................................................................................................244.2 CKE Truth Table ...................................................................................................................................................254.3 Burst Length, Type and Order ..............................................................................................................................264.3.1 BL8 Burst order with CRC Enabled .........................................................................................................264.4 DLL-off Mode & DLL on/off Switching procedure ................................................................................................274.4.1 DLL on/off switching procedure ...............................................................................................................274.4.2 DLL “on” to DLL “off” Procedure ..............................................................................................................274.4.3 DLL “off” to DLL “on” Procedure ..............................................................................................................284.5 DLL-off Mode........................................................................................................................................................294.6 Input Clock Frequency Change ............................................................................................................................304.7 Write Leveling.......................................................................................................................................................314.7.1 DRAM setting for write leveling & DRAM termination function in that mode ............................................324.7.2 Procedure Description .............................................................................................................................334.7.3 Write Leveling Mode Exit .........................................................................................................................34

    標(biāo)簽: DDR4

    上傳時間: 2022-01-09

    上傳用戶:

  • STM32L053C8T6數(shù)據(jù)手冊

    STM32L053C8T6數(shù)據(jù)手冊Features ? Ultra-low-power platform – 1.65 V to 3.6 V power supply – -40 to 125 °C temperature range – 0.27 μA Standby mode (2 wakeup pins) – 0.4 μA Stop mode (16 wakeup lines) – 0.8 μA Stop mode + RTC + 8 KB RAM retention – 139 μA/MHz Run mode at 32 MHz – 3.5 μs wakeup time (from RAM) – 5 μs wakeup time (from Flash) ? Core: ARM? 32-bit Cortex?-M0+ with MPU – From 32 kHz up to 32 MHz max.  – 0.95 DMIPS/MHz ? Reset and supply management – Ultra-safe, low-power BOR (brownout reset)  with 5 selectable thresholds – Ultralow power POR/PDR – Programmable voltage detector (PVD) ? Clock sources – 1 to 25 MHz crystal oscillator – 32 kHz oscillator for RTC with calibration – High speed internal 16 MHz factory-trimmed RC  (+/- 1%) – Internal low-power 37 kHz RC – Internal multispeed low-power 65 kHz to  4.2 MHz RC – PLL for CPU clock ? Pre-programmed bootloader – USART, SPI supported ? Development support – Serial wire debug supported ? Up to 51 fast I/Os (45 I/Os 5V tolerant) ? Memories – Up to 64 KB Flash with ECC – 8KB RAM – 2 KB of data EEPROM with ECC – 20-byte backup register

    標(biāo)簽: stm32l053c8t6

    上傳時間: 2022-02-06

    上傳用戶:

  • PW5300_2.0.pdf規(guī)格書下載

    The PW5300 is a current mode boost DC-DC converter. Its PWM circuitry with built-in 0.2? powerMOSFET make this regulator highly power efficient. The internal compensation network alsominimizes as much as 6 external component counts. The non-inverting input of error amplifierconnects to a 0.6V precision reference voltage and internal soft-start function can reduce the inrushcurrent. The PW5300 is available in the SOT23-6L package and provides space-saving PCB for theapplication fields

    標(biāo)簽: pw5300

    上傳時間: 2022-02-11

    上傳用戶:jiabin

  • PW5200系列_2.0.pdf規(guī)格書下載

    The PW5200A/ PW5200C is high efficiency synchronous, PWM step-up DC/DC converters optimizedto provide a high efficient solution to medium power systems. The devices work with a 1.4MHz fixedfrequency switching. These features minimize overall solution footprint by allowing the use of tiny,low profile inductors and ceramic capacitors. Automatic PWM/PFM mode switching at light loadsaves power and improves efficiency

    標(biāo)簽: pw5200

    上傳時間: 2022-02-11

    上傳用戶:

  • PW4055_2.0.pdf規(guī)格書下載

    The PW4055 is a complete constant-current /constant-voltage linear charger for single cell lithiumion batteries.Its ThinSOT package and low external component count make the PW4055 ideallysuited for portable applications.Furthermore, the PW4055 is specifically designed to work within USBpower specifications.The PW4055 No external sense resistor is needed, and no blocking diode is required due to theinternal MOSFET architecture.Thermal feedback regulates the charge current to limit the dietemperature during high power operation or high ambient temperature. The charge voltage is fixedat 4.2V, and the charge current can be programmed externally with a single resistor. The PW4055automatically terminates the charge cycle when the charge current drops to 1/10th the programmedvalue after the final float voltage is reached. When the input supply (wall adapter or USB supply) isremoved, the PW4055 automatically enters a low current state, dropping the battery drain currentto less than 2μA. The PW4055 can be put into shutdown mode, reducing the supply current to 25μA.The BAT pin has a 7KV ESD(HBM) capability. Other features include charge current monitor, undervoltage lockout, automatic recharge and a status pin to indicate charge termination and the presenceof an input voltage

    標(biāo)簽: pw4055

    上傳時間: 2022-02-11

    上傳用戶:jason_vip1

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