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STANDARD-ISOIEC

  • 87C576微控制器的在線編程

    The 87C576 includes two separate methods of programming theEPROM array, the traditional modified Quick-Pulse method, and anew On-Board Programming technique (OBP).Quick Pulse programming is a method using a number of devicepins in parallel (see Figure 1) and is the traditional way in which87C51 family members have been programmed. The Quick-Pulsemethod supports the following programming functions:– program USER EPROM– verify USER EPROM– program KEY EPROM– program security bits– verify security bits– read signature bytesThe Quick-Pulse method is quite easily suited to standardprogramming equipment as evidenced by the numerous vendors of87C51 compatible programmers on the market today. Onedisadvantage is that this method is not well suited to programming inthe embedded application because of the large number of signallines that must be isolated from the application. In addition, parallelsignals from a programmer would need to be cabled to theapplication’s circuit board, or the application circuit board wouldneed to have logic built-in to perform the programming functions.These requirements have generally made in-circuit programmingusing the modified Quick Pulse method impractical in almost all87C51 family applications.

    標簽: 87C576 微控制器 編程

    上傳時間: 2013-10-21

    上傳用戶:xiaozhiqban

  • winCE msdn講座

    winCE msdn講座 XP Embedded Now and the future Windows XP Embedded Developmentand Deployment Model OverviewWindows XP Embedded Component ModelWindows XP Embedded Studio Tools Microsoft WindowsXP Embedded Product Highlights Componentized version of Windows XP Professional~ 12,000 components and updates as of Service Pack 2Flexible localizationSame binaries and API as Windows XP ProfessionalHotfixes and service packsEmbedded Enabling FeaturesRuns on standard PC hardwareSupports boot on hard drives, compact flash, DiskOnChipand read-only mediaSupport for remote install and remote bootHeadless device and remote management supportIntegration with Microsoft management tools

    標簽: winCE msdn 講座

    上傳時間: 2013-10-31

    上傳用戶:jrsoft

  • 微型計算機總線知識

    計算機部件要具有通用性,適應不同系統與不同用戶的需求,設計必須模塊化。計算機部件產品(模塊)供應出現多元化。模塊之間的聯接關系要標準化,使模塊具有通用性。模塊設計必須基于一種大多數廠商認可的模塊聯接關系,即一種總線標準。總線的標準總線是一類信號線的集合是模塊間傳輸信息的公共通道,通過它,計算機各部件間可進行各種數據和命令的傳送。為使不同供應商的產品間能夠互換,給用戶更多的選擇,總線的技術規范要標準化??偩€的標準制定要經周密考慮,要有嚴格的規定??偩€標準(技術規范)包括以下幾部分:機械結構規范:模塊尺寸、總線插頭、總線接插件以及按裝尺寸均有統一規定。功能規范:總線每條信號線(引腳的名稱)、功能以及工作過程要有統一規定。電氣規范:總線每條信號線的有效電平、動態轉換時間、負載能力等??偩€的發展情況S-100總線:產生于1975年,第一個標準化總線,為微計算機技術發展起到了推動作用。IBM-PC個人計算機采用總線結構(Industry Standard Architecture, ISA)并成為工業化的標準。先后出現8位ISA總線、16位ISA總線以及后來兼容廠商推出的EISA(Extended ISA)32位ISA總線。為了適應微處理器性能的提高及I/O模塊更高吞吐率的要求,出現了VL-Bus(VESA Local Bus)和PCI(Peripheral Component Interconnect,PCI)總線。適合小型化要求的PCMCIA(Personal Computer Memory Card International Association)總線,用于筆記本計算機的功能擴展??偩€的指標計算機主機性能迅速提高,各功能模塊性能也要相應提高,這對總線性能提出更高的要求??偩€主要技術指標有幾方面:總線寬度:一次操作可以傳輸的數據位數,如S100為8位,ISA為16位,EISA為32位,PCI-2可達64位。總線寬度不會超過微處理器外部數據總線的寬度??倲倒ぷ黝l率:總線信號中有一個CLK時鐘,CLK越高每秒鐘傳輸的數據量越大。ISA、EISA為8MHz,PCI為33.3MHz, PCI-2可達達66.6MHz。單個數據傳輸周期:不同的傳輸方式,每個數據傳輸所用CLK周期數不同。ISA要2個,PCI用1個CLK周期。這決定總線最高數據傳輸率。5. 總線的分類與層次系統總線:是微處理器芯片對外引線信號的延伸或映射,是微處理器與片外存儲器及I/0接口傳輸信息的通路。系統總線信號按功能可分為三類:地址總線(Where):指出數據的來源與去向。地址總線的位數決定了存儲空間的大小。系統總線:數據總線(What)提供模塊間傳輸數據的路徑,數據總線的位數決定微處理器結構的復雜度及總體性能。控制總線(When):提供系統操作所必需的控制信號,對操作過程進行控制與定時。擴充總線:亦稱設備總線,用于系統I/O擴充。與系統總線工作頻率不同,經接口電路對系統總統信號緩沖、變換、隔離,進行不同層次的操作(ISA、EISA、MCA)局部總線:擴充總線不能滿足高性能設備(圖形、視頻、網絡)接口的要求,在系統總線與擴充總線之間插入一層總線。由于它經橋接器與系統總線直接相連,因此稱之為局部總線(PCI)。

    標簽: 微型計算機 總線

    上傳時間: 2013-11-09

    上傳用戶:nshark

  • PL2303 USB to Serial Adapter

    The PL2303 USB to Serial adapter is your smart and convenient accessory forconnecting RS-232 serial devices to your USB-equipped Windows host computer. Itprovides a bridge connection with a standard DB 9-pin male serial port connector inone end and a standard Type-A USB plug connector on the other end. You simplyattach the serial device onto the serial port of the cable and plug the USB connectorinto your PC USB port. It allows a simple and easy way of adding serial connectionsto your PC without having to go thru inserting a serial card and traditional portconfiguration.This USB to Serial adapter is ideal for connecting modems, cellular phones, PDAs,digital cameras, card readers and other serial devices to your computer. It providesserial connections up to 1Mbps of data transfer rate. And since USB does not requireany IRQ resource, more devices can be attached to the system without the previoushassles of device and resource conflicts.Finally, the PL-2303 USB to Serial adapter is a fully USB Specification compliantdevice and therefore supports advanced power management such as suspend andresume operations as well as remote wakeup. The PL-2303 USB Serial cable adapteris designed to work on all Windows operating systems.

    標簽: Adapter Serial 2303 USB

    上傳時間: 2013-11-01

    上傳用戶:ghostparker

  • at89c52 pdf

    The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s high-density nonvolatile memory technology and iscompatible with the industry-standard 80C51 and 80C52 instruction set and pinout.The on-chip Flash allows the program memory to be reprogrammed in-system or by aconventional nonvolatile memory programmer. By combining a versatile 8-bit CPUwith Flash on a monolithic chip, the Atmel AT89C52 is a powerful microcomputerwhich provides a highly-flexible and cost-effective solution to many embedded controlapplications.

    標簽: 89c c52 at

    上傳時間: 2013-11-10

    上傳用戶:1427796291

  • Xilinx UltraScale:新一代架構滿足您的新一代架構需求(EN)

      中文版詳情瀏覽:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.   The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.   Some of the UltraScale architecture breakthroughs include:   • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%    • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability   • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization   • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard    • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets   • Greatly enhanced DSP and packet handling   The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.

    標簽: UltraScale Xilinx 架構

    上傳時間: 2013-11-13

    上傳用戶:瓦力瓦力hong

  • 采用TüV認證的FPGA開發功能安全系統

    This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System

    標簽: FPGA 安全系統

    上傳時間: 2013-11-05

    上傳用戶:維子哥哥

  • WP401-FPGA設計的DO-254

    The standard that governs the design of avioniccomponents and systems, DO-254, is one of the mostpoorly understood but widely applicable standardsin the avionic industry. While information on thegeneral aspects of the standard is easy to obtain, thedetails of exactly how to implement the standard aresketchy. And once an entity develops a process thatachieves compliance, the details of how compliancewas achieved become part of the intellectualproperty of that entity. This white paper focuses onthe details of developing a DO-254 compliantprocess for the design of FPGAs.

    標簽: FPGA 401 254 WP

    上傳時間: 2013-11-12

    上傳用戶:q123321

  • WP328-FPGA的語音數據融合

      The SDI standards are the predominant standards for uncompressed digital videointerfaces in the broadcast studio and video production center. The first SDI standard,SD-SDI, allowed standard-definition digital video to be transported over the coaxial cableinfrastructure initially installed in studios to carry analog video. Next, HD-SDI wasto support high-definition video. Finally, dual link HD-SDI and 3G-SDIdoubled the bandwidth of HD-SDI to support 1080p (50 Hz and 60 Hz) and other videoformats requiring more bandwidth than HD-SDI provides.

    標簽: FPGA 328 WP 語音

    上傳時間: 2013-10-08

    上傳用戶:yjj631

  • WP369可擴展式處理平臺-各種嵌入式系統的理想解決方案

    WP369可擴展式處理平臺-各種嵌入式系統的理想解決方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.

    標簽: 369 WP 擴展式 處理平臺

    上傳時間: 2013-10-22

    上傳用戶:685

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