crc_table.c is for reset seed( 0000 )
crc_table_1.c is for reset seed( ffff)
CRC16_D8_m.v is a verilog module of byte paralle crc.
CRC16_D8_m_tb.v is the testbench file of above module.
標(biāo)簽：
crc_table
reset
seed
for
上傳時(shí)間：
2014-01-09
上傳用戶(hù)：181992417
