The Cyclone® III PCI development board provides a hardware platform for developing and
prototyping low-power, high-performance, logic-intensive PCI-based designs. The board provides a
high-density of the memory to facilitate the design and development of FPGA designs which need
huge memory storage, and also includes Low-Voltage Differential Signaling (LVDs) interface of
the High-Speed Terasic Connectors (HSTCs) for extra high-speed interface application.
ICN6201/02 is a bridge chip which receives MIPI? DSI inputs and sends LVDs outputs.
MIPI? DSI supports up to 4 lanes and each lane operates at 1Gbps maximum; the totally maximum input
bandwidth is 4Gbps; and the MIPI defined ULPS(ultra-low-power state) is also supported. ICN6201 decodes
MIPI? DSI 18bepp RGB666 and 24bpp RGB888 packets.The LVDs output 18 or 24 bits pixel with 25MHz to 154MHz, by VESA or JEIDA format.ICN6201/02 support video resolution up to FHD (1920x1080) and WUXGA (1920x1200).ICN6201 adopts QFN48 package and ICN6202 adopts QFN40 package
