System Generator 8.1。用戶將很快發(fā)現(xiàn)新版本帶來的全新感覺。新版本中大大增強(qiáng)了Block Dialog Boxes的功能，許多模塊的參數(shù)選擇功能也得到了加強(qiáng)。
標(biāo)簽： Generator System 9.10
上傳時(shí)間： 2013-07-09
上傳用戶：heminhao
FEATURES Unique 1-Wire interface requires only one port pin for communication Multidrop capability simplifies distributed temperature sensing applications Requires no external components Can be powered from data line. Power supply range is 3.0V to 5.5V Zero standby power required Measures temperatures from -55°C to +125°C. Fahrenheit equivalent is -67°F to +257°F ±0.5°C accuracy from -10°C to +85°C Thermometer resolution is programmable from 9 to 12 bits Converts 12-bit temperature to digital word in 750 ms (max.) User-definable, nonvolatile temperature alarm settings Alarm search command identifies and addresses devices whose temperature is outside of programmed limits (temperature alarm condition) Applications include thermostatic controls, industrial systems, consumer products, thermometers, or any thermally sensitive system
上傳時(shí)間： 2013-08-04
上傳用戶：CHENKAI
·Applied Mathematics in Integrated Navigation Systems
標(biāo)簽： nbsp Mathematics Integrated Navigation
上傳時(shí)間： 2013-07-17
上傳用戶：liu_yuankang
資料->【E】光盤論文->【E1】斯坦福博士論文->03 calgary PhD Improving the Inertial Navigation System (INS) Error Model for INS and INSDGPS Applications.pdf
標(biāo)簽： Navigation Improving INS Inertial
上傳時(shí)間： 2013-08-01
上傳用戶：wzr0701
ink in c++.chm C++編程思想 經(jīng)典書籍 非常方便，需要的請(qǐng)下載吧。
上傳時(shí)間： 2013-06-12
上傳用戶：yanming8525826
This brief introduce a kind of the framework construction to materialize the system. And an example was given with the discussion on the performence.
標(biāo)簽： construction materialize introduce framework
上傳時(shí)間： 2013-08-17
上傳用戶：ysystc699
Practical FPGA Programming in C \r\nBy David Pellerin, Scott Thibault \r\nPublisher: Prentice Hall PTR \r\nPub Date: April 22, 2005 \r\nISBN: 0-13-154318-0 \r\nPages: 464 \r\n
標(biāo)簽： Programming Practical FPGA in
上傳時(shí)間： 2013-08-31
上傳用戶：firstbyte
The DSP Design Flow workshop provides an introduction to the advanced tools you need to design and implement DSP algorithms targeting FPGAs. This intermediate workshop in implementing DSP functions focuses on learning how to use System Generator for DSP,
標(biāo)簽： workshop provides Design Flow
上傳時(shí)間： 2013-09-02
上傳用戶：joheace
Fpga Implementation Of Digital Timing Recovery In Software Radio Receiver
標(biāo)簽： Implementation Recovery Receiver Software
上傳時(shí)間： 2013-09-05
上傳用戶：panpanpan
本設(shè)計(jì)的基本要求是以復(fù)雜可編程邏輯器件CPLD為基礎(chǔ)，通過在EDA系統(tǒng)軟件ispDesignExpert System 環(huán)境下進(jìn)行數(shù)字系統(tǒng)設(shè)計(jì)，熟練掌握該環(huán)境下的功能仿真，時(shí)間仿真，管腳鎖定和芯片下載。 本系統(tǒng)基本上比較全面的模擬了計(jì)數(shù)式數(shù)字頻率計(jì)，廣泛應(yīng)用于工業(yè)、民用等各個(gè)領(lǐng)域，具有一定的開發(fā)價(jià)值。
標(biāo)簽： ispDesignExpert System EDA 系統(tǒng)軟件
上傳時(shí)間： 2013-09-05
上傳用戶：文993
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