USB On-The-Go Full Speed Host and High Speed Peripheral Controller
標(biāo)簽： Speed Controller Peripheral On-The-Go
上傳時(shí)間： 2014-11-27
上傳用戶：1427796291
Wishbone to LPC (Low-Pin Count) Bridge, includes master and slave modules. Supports 8-bit I/O Read and Write cycles, 8-bit Memory Read/Write cycles, DMA cycles, and up to 32-bit Firmware memory read/write cycles. Serial IRQ support is also provided. None of this has been tested (yet) with a third-party LPC Peripheral or Host.
標(biāo)簽： Wishbone Supports includes Low-Pin
上傳時(shí)間： 2014-12-20
上傳用戶：古谷仁美
This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently supports single-cycle as well as burst transfer operations. The core has been tested in a master-PIF slave-WB configuration.
標(biāo)簽： Tensilica OpenCores interface the
上傳時(shí)間： 2013-12-21
上傳用戶：gonuiln
This project features a full-hardware sound compressor using the well known algorithm: IMA ADPCM. The core acts as a slave WISHBONE device. The output is perfectly compatible with any sound player with the IMA ADPCM codec (included by default in every Windows). Includes a testbench that takes an uncompressed PCM 16 bits Mono WAV file and outputs an IMA ADPCM compressed WAV file. Compression ratio is fixed for IMA-ADPCM, being 4:1. PLEASE NOTICE THAT THIS CORE IS LICENSED UNDER http://creativecommons.org/licenses/by-nc-sa/3.0/ (Creative Commons Attribution-Noncommercial-Share Alike 3.0 Unported). That means you may use it only for NON-COMMERCIAL purposes.
標(biāo)簽： full-hardware compressor algorithm features
上傳時(shí)間： 2014-01-14
上傳用戶：Shaikh
RX Library contains a large number of components, objects and routines for Borland Delphi with full source code. This library is compatible with Borland Delphi 1, 2, 3, 4 and Borland C++ Builder 1 and 3.
標(biāo)簽： components contains routines Library
上傳時(shí)間： 2013-12-30
上傳用戶：daguda
full UART function by 8051
標(biāo)簽： function full UART 8051
上傳時(shí)間： 2014-01-27
上傳用戶：李夢(mèng)晗
Full Uart by 8051 (assembly)
標(biāo)簽： assembly Full 8051 Uart
上傳時(shí)間： 2017-07-01
上傳用戶：米卡
convert RGB to HSV, full
標(biāo)簽： convert full RGB HSV
上傳時(shí)間： 2013-12-12
上傳用戶：asddsd
this is a full adder using VHDL it s really helpful
標(biāo)簽： helpful really adder using
上傳時(shí)間： 2013-12-20
上傳用戶：lacsx
Show image on label in its full size
標(biāo)簽： image label Show full
上傳時(shí)間： 2017-07-07
上傳用戶：xzt
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