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Eigen-space

  • 基于單片機(jī)系統(tǒng)的(24,16)循環(huán)碼編碼、譯碼方案

      在理論分析循環(huán)碼編碼和譯碼基本原理的基礎(chǔ)上,提出了基于單片機(jī)系統(tǒng)的(24,16)循環(huán)碼軟件實(shí)現(xiàn)編碼、譯碼的方案。仿真結(jié)果表明(24,16)循環(huán)碼能有效地克服來(lái)自通訊信道的干擾,保證數(shù)據(jù)通信的可靠及系統(tǒng)的穩(wěn)定,使誤碼率大幅度降低。本論文對(duì)(24,16)循環(huán)碼的研究結(jié)果表明,可以有效地降低錯(cuò)誤概率和提高系統(tǒng)的吞吐量,實(shí)現(xiàn)糾錯(cuò)僅需要在接收端增加有限的存儲(chǔ)空間和計(jì)算復(fù)雜度,具有一定的實(shí)用價(jià)值。   Abstract:   Based on analyzing the theory of encoding and decoding of cyclic code, this paper showed the schemes of encoding and decoding of(24,16)cyclic code by the software and based on microcontroller. Simulation results show that using (24,16) cyclic codes can effectively overcome the interference from communication channel, ensure the reliability and stability of data communication systems, and reduce the bit error rate greatly. The results of this paper show that by using the (24,16) cyclic code, the error rate can be reduced and the system throughput can be improved. Meanwhile, the system only needs to enlarge limited storage space and computation the complexity at the receiving end to realize error correction. Thus the (24,16) cyclic code has a practical value.  

    標(biāo)簽: 24 16 單片機(jī)系統(tǒng) 循環(huán)碼

    上傳時(shí)間: 2013-11-09

    上傳用戶:gaoliangncepu

  • 單片機(jī)P0口的片外數(shù)據(jù)存儲(chǔ)器擴(kuò)展

    單片機(jī)作為一種微型計(jì)算機(jī),其內(nèi)部具有一定的存儲(chǔ)單元(8031除外),但由于其內(nèi)部存儲(chǔ)單元及端口有限,很多情況下難以滿足實(shí)際需求。為此介紹一種新的擴(kuò)展方法,將數(shù)據(jù)線與地址線合并使用,通過軟件控制的方法實(shí)現(xiàn)數(shù)據(jù)線與地址線功能的分時(shí)轉(zhuǎn)換,數(shù)據(jù)線不僅用于傳送數(shù)據(jù)信號(hào),還可作為地址線、控制線,用于傳送地址信號(hào)和控制信號(hào),從而實(shí)現(xiàn)單片機(jī)與存儲(chǔ)器件的有效連接。以單片機(jī)片外256KB數(shù)據(jù)存儲(chǔ)空間的擴(kuò)展為例,通過該擴(kuò)展方法,僅用10個(gè)I/O端口便可實(shí)現(xiàn),與傳統(tǒng)的擴(kuò)展方法相比,可節(jié)約8個(gè)I/O端口。 Abstract:  As a micro-computer,the SCM internal memory has a certain units(except8031),but because of its internal storage units and the ports are limited,in many cases it can not meet the actual demand.So we introduced a new extension method,the data line and address lines combined through software-controlled approach to realize the time-conversion functions of data lines and address lines,so the data lines not only transmited data signals,but also served as address lines and control lines to transmit address signals and control signals,in order to achieve an effective connection of microcontroller and memory chips.Take microcontroller chip with256KB of data storage space expansion as example,through this extension method,with only10I/O ports it was achieved,compared with the traditional extension methods,this method saves8I/O ports.

    標(biāo)簽: 單片機(jī) P0口 數(shù)據(jù)存儲(chǔ)器 擴(kuò)展

    上傳時(shí)間: 2014-12-26

    上傳用戶:adada

  • Agilent Wedge for Probing High

    IntroductionAs chip designers pack more functions into ICs,pin counts continue to grow and the space betweenpins keeps shrinking. Pin spacings of 0.5 mm and0.65 mm are not at all uncommon. The power ofthese new ICs is wonderful, to be sure, but trou-bleshooting them can be a chore because connect-ing scopes and logic analyzers has become muchmore difficult and less dependable.

    標(biāo)簽: Agilent Probing Wedge High

    上傳時(shí)間: 2013-10-22

    上傳用戶:蔣清華嗯

  • XAPP098 - Spartan FPGA低成本、高效率串行配置

    This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing Spartan configuration.In particular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream over a network.

    標(biāo)簽: Spartan XAPP FPGA 098

    上傳時(shí)間: 2014-08-16

    上傳用戶:adada

  • STBC系統(tǒng)在非同分布Nakagami信道下性能評(píng)估

    摘  要: 針對(duì)非同分布的Nakagami信道,基于矩生成函數(shù)MGF(Moment Generation Function)的分析方法,提出正交空時(shí)分組碼系統(tǒng)STBC(Space-Time Block Coding)的一種快速性能評(píng)估算法,不需要涉及超幾何函數(shù)積分運(yùn)算,可在中高信噪比時(shí),快速準(zhǔn)確地估計(jì)STBC系統(tǒng)的符號(hào)錯(cuò)誤概率性能。在平坦瑞利衰落信道下的計(jì)算機(jī)仿真表明,該算法與已有的STBC系統(tǒng)的近似估計(jì)算法相比,具有較優(yōu)的性能。      關(guān)鍵詞: 正交空時(shí)分組碼; MIMO; MGF; 誤符號(hào)率  

    標(biāo)簽: Nakagami STBC 分布

    上傳時(shí)間: 2014-12-29

    上傳用戶:如果你也聽說(shuō)

  • 通過整合硬件分立收發(fā)器簡(jiǎn)化AISG的控制系統(tǒng)

    Abstract: This article describes the Antenna Interface Standards Group (AISG) standard in telecommunications and details itshardware implementation. It explains how a fully integrated transceiver such as the MAX9947 can help reduce space and cost, andsolve bus arbitrations in base-station tower equipment.

    標(biāo)簽: AISG 硬件 分立收發(fā)器 控制系統(tǒng)

    上傳時(shí)間: 2014-12-30

    上傳用戶:wangchong

  • 怎樣使用Nios II處理器來(lái)構(gòu)建多處理器系統(tǒng)

    怎樣使用Nios II處理器來(lái)構(gòu)建多處理器系統(tǒng) Chapter 1. Creating Multiprocessor Nios II Systems Introduction to Nios II Multiprocessor Systems . . . . . . . . . . . . . . 1–1 Benefits of Hierarchical Multiprocessor Systems  . . . . . . . . . . . . . . . 1–2 Nios II Multiprocessor Systems . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . . 1–2 Multiprocessor Tutorial Prerequisites   . . . . . . . . . . .  . . . . . . . . . . . . 1–3 Hardware Designs for Peripheral Sharing   . . . . . . . . . . . .. . . . . . . . 1–3 Autonomous Multiprocessors   . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . 1–3 Multiprocessors that Share Peripherals . . . . . . . . . . . . . . . . . . . . . . 1–4 Sharing Peripherals in a Multiprocessor System   . . . . . . . . . . . . . . . . . 1–4 Sharing Memory  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–6 The Hardware Mutex Core  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . 1–7 Sharing Peripherals   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . 1–8 Overlapping Address Space  . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . 1–8 Software Design Considerations for Multiple Processors . . .. . . . . 1–9 Program Memory  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–9 Boot Addresses  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1–13 Debugging Nios II Multiprocessor Designs  . . . . . . . . . . . . . . . .  1–15 Design Example: The Dining Philosophers’ Problem   . . . . .. . . 1–15 Hardware and Software Requirements . . . . . . . . . . . . . . . .. . . 1–16 Installation Notes  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–17 Creating the Hardware System   . . . . . . . . . . . . . . .. . . . . . 1–17 Getting Started with the multiprocessor_tutorial_start Design Example   1–17 Viewing a Philosopher System   . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . 1–18 Philosopher System Pipeline Bridges  . . . . . . . . . . . . . . . . . . . . . 1–19 Adding Philosopher Subsystems   . . . . . . . . . . . . . . . . . . . . . .  . . . . 1–21 Connecting the Philosopher Subsystems  . . . . . . . . . . . . .. . . . . 1–22 Viewing the Complete System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–27 Generating and Compiling the System   . . . . . . . . . . . . . . . . . .. 1–28

    標(biāo)簽: Nios 處理器 多處理器

    上傳時(shí)間: 2013-11-21

    上傳用戶:lo25643

  • XAPP098 - Spartan FPGA低成本、高效率串行配置

    This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing Spartan configuration.In particular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream over a network.

    標(biāo)簽: Spartan XAPP FPGA 098

    上傳時(shí)間: 2013-11-01

    上傳用戶:wojiaohs

  • XAPP328-使用CPLD設(shè)計(jì)MP3播放器

      MP3 portable players are the trend in music-listening technology. These players do not includeany mechanical movements, thereby making them ideal for listening to music during any type ofactivity. MP3 is a digital compression technique based on MPEG Layer 3 which stores music ina lot less space than current CD technology. Software is readily available to create MP3 filesfrom an existing CD, and the user can then download these files into a portable MP3 player tobe enjoyed in almost any environment.

    標(biāo)簽: XAPP CPLD 328 MP3

    上傳時(shí)間: 2013-11-23

    上傳用戶:nanxia

  • Protel DXP快捷鍵大全

    enter——選取或啟動(dòng) esc——放棄或取消 f1——啟動(dòng)在線幫助窗口 tab——啟動(dòng)浮動(dòng)圖件的屬性窗口 pgup——放大窗口顯示比例 pgdn——縮小窗口顯示比例 end——刷新屏幕 del——刪除點(diǎn)取的元件(1個(gè)) ctrl+del——刪除選取的元件(2個(gè)或2個(gè)以上) x+a——取消所有被選取圖件的選取狀態(tài) x——將浮動(dòng)圖件左右翻轉(zhuǎn) y——將浮動(dòng)圖件上下翻轉(zhuǎn) space——將浮動(dòng)圖件旋轉(zhuǎn)90度 crtl+ins——將選取圖件復(fù)制到編輯區(qū)里 shift+ins——將剪貼板里的圖件貼到編輯區(qū)里 shift+del——將選取圖件剪切放入剪貼板里 alt+backspace——恢復(fù)前一次的操作 ctrl+backspace——取消前一次的恢復(fù) crtl+g——跳轉(zhuǎn)到指定的位置 crtl+f——尋找指定的文字  

    標(biāo)簽: Protel DXP 快捷鍵

    上傳時(shí)間: 2013-11-01

    上傳用戶:a296386173

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