§培訓目標： 本課程主要對EVDO的基本原理和關(guān)鍵技術(shù)進行介紹。通過本課程的學習，可以了解EVDO Rev.0和Rev.A的空中接口和關(guān)鍵技術(shù)，以及1X/DO互操作的相關(guān)規(guī)則等。 §培訓內(nèi)容： EVDO技術(shù)發(fā)展、網(wǎng)絡(luò)結(jié)構(gòu)簡介; EVDO Rev.0和RevA的空中接口結(jié)構(gòu); EVDO Rev.0和RevA的關(guān)鍵技術(shù); 1X / DO互操作原則;
標簽： EVDO 關(guān)鍵技術(shù)
上傳時間： 2014-03-25
上傳用戶：d815185728
Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise,without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reservesthe right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errorscontained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection withtechnical support or assistance that may be provided to you in connection with the Information.
上傳時間： 2013-11-11
上傳用戶：zwei41
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上傳時間： 2013-11-23
上傳用戶：shen_dafa
Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the Documentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reserves the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be provided to you in connection with the Information.
標簽： CPLD
上傳時間： 2014-12-05
上傳用戶：qazxsw
We would like to welcome you as a user of the Allegro CX, a rugged, handheld fi eld PC for data collection. Developed with the input of data collection professionals worldwide, the Allegro CX is adaptable and versatile for use in a wide variety of data collection environments. The Allegro CX continues to utilize our ergonomic, lightweight design that is standard in our line of Allegro Field PCs. This design makes your Allegro easy to use for extended periods while moving to and from data collection sites in the fi eld.
上傳時間： 2015-01-02
上傳用戶：zhangyi99104144
bianpin
上傳時間： 2013-11-05
上傳用戶：qwe1234
西門子建筑電器-電氣安裝技術(shù)部發(fā)行的各類產(chǎn)品樣本：小型斷路器、剩余電流保護斷路器和模數(shù)化產(chǎn)品(中/ 英文)Miniature Circuit-Breakers, Residual Current Operated Circuit-Breakers and Modular Devices (Chinese/English)低壓熔斷器系統(tǒng)(中/ 英文)Fuse System (Chinese/English)雷擊，過電壓－不再是問題(中文)Thunderstorms - no problem (Chinese)西門子建筑電器目錄(中文)Electrical Installation Technology Catalog (Chinese)終端配電保護產(chǎn)品(中文)5 IN 1 (Chinese)SIKUS 和 STAB UNIVERSAL 目錄(中文)SIKUS and STAB UNIVERSAL Catalogue (Chinese)SIKUS HC 目錄(中文)SIKUS HC Catalogue (Chinese)SentronTM 母線槽 (中文)SentronTM Busway System (Chinese)SentronTM 母線槽系統(tǒng)快速選型 (準備中) (中文)SentronTM Busway System quick selection (in preparing) (Chinese)建筑低壓配電一體化解決方案－住宅小區(qū)應用(中文)Building LV PD Solution (Chinese)西門子 DELTA vista“遠景”系列開關(guān)和插座價目表(中文)Delta vista Switch and Socket Pricelist (Chinese)instabus EIB 面向未來的樓宇智能控制系統(tǒng)(中文)instabus EIB (Chinese)instabus EIB 面向未來的樓宇智能控制系統(tǒng)技術(shù)手冊 (準備中) (中文)instabus EIB technical handbook (in preparing) (Chinese)西門子電氣安裝技術(shù)業(yè)績卓越(中/ 英文)ET Reference Manual (Chinese/English)
上傳時間： 2013-11-23
上傳用戶：瓦力瓦力hong
第一章TOPAV-2008單片機試驗開發(fā)系統(tǒng)簡介 TOPAV-2008單片機實驗開發(fā)系統(tǒng)是一款專業(yè)的高級單片機實驗開發(fā)板，內(nèi)置豐富的試驗硬件資源和接口，特別適合單片機初學者和音響軟件開發(fā)工程師！國內(nèi)首創(chuàng)！ 從單片機入門到開發(fā)復雜的功放大型程序，TOPAV-2008開發(fā)板和所配置的大量入門及專業(yè)教程，完整豐富的例程,大量專業(yè)器件行業(yè)資料，將逐步引領(lǐng)您快速入門與提高，減少您對音響軟件的摸索時間，大膽公開音響行業(yè)保密的編程技術(shù)及傳統(tǒng)經(jīng)典商業(yè)程序模塊，我們的目的是希望您通過對例程的學習，真正能獨立編寫大型的程序！ TOPAV-2008首創(chuàng)PT2314/PT2257/FM62429系列音效IC，360度旋轉(zhuǎn)編碼電位器音量控制，VFDPT6312，VFDPT6311顯示模塊，PLL汽車數(shù)字調(diào)諧AM/FM收音機，以及入門必備的數(shù)碼管，流水燈，LED，繼電器，蜂鳴器等，讓您迅速掌握遙控花式燈，數(shù)碼管秒表，數(shù)碼管電子表，遙控解碼，鍵盤按鍵掃描，真空熒光顯示屏的顯示，6311/6312按鍵掃描，PT2314輸入切換，音量調(diào)節(jié)，高低音調(diào)節(jié)，平衡調(diào)節(jié)，“搖滾”“流行”“爵士“…等8種音效模式，動態(tài)頻譜顯示，復雜的汽車數(shù)字收音AM/FM的手動電臺接收等等！
上傳時間： 2013-11-18
上傳用戶：dragonhaixm
mp3設(shè)計程序資料，采用c語言編寫。 README file for yampp-3 source code 2001-05-27 This is the current state of the yampp-3 source code, 2001-05-27. This code is intended to run on Rev. B of the yampp-3 PCB, but can ofcourse be used on compatible systems as well. It still uses the "old" song selection system as the yampp-2. However, the disk handling routines has improved a lot and the obviosly, the new VS1001 handling has been put in. The codesize is almost at it s maximum at 1F40 bytes. A .ROM file is included if you don t have the compiler set up. For now, the documentation is in the code
上傳時間： 2015-04-13
上傳用戶：小碼農(nóng)lz
There are some 79 or so Matlab files here which will help in many aspects of the computer vision structure from motion problem, a full description is provided in the manual, torrsam.ps.
標簽： computer aspects Matlab vision
上傳時間： 2014-01-02
上傳用戶：xlcky
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