用51單片機(jī)實(shí)現(xiàn)數(shù)字鐘 利用數(shù)碼管、I/O口實(shí)現(xiàn)數(shù)字鐘的計(jì)數(shù)功能，并顯示在數(shù)碼管上
標(biāo)簽： 數(shù)字 51單片機(jī) 利用數(shù)碼
上傳時(shí)間： 2013-12-24
上傳用戶：franktu
The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the door to increasing system speed and expansion capabilities. The PCI Local bus moves high speed peripherals from the I/O bus and places them closer to the system’s processor bus, providing faster data transfers between the processor and peripherals. The PCI Local bus also addresses the industry’s need for a bus standard which is not directly dependent on the speed, size and type of system processor. It represents the first microprocessor independent bus offering performance more than adequate for the most demanding applications such as full-motion video.
標(biāo)簽： bottleneck developed the concept
上傳時(shí)間： 2014-12-03
上傳用戶：ikemada
The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the door to increasing system speed and expansion capabilities. The PCI Local bus moves high speed peripherals from the I/O bus and places them closer to the system’s processor bus, providing faster data transfers between the processor and peripherals. The PCI Local bus also addresses the industry’s need for a bus standard which is not directly dependent on the speed, size and type of system processor. It represents the first microprocessor independent bus offering performance more than adequate for the most demanding applications such as full-motion video. Hardware reference
標(biāo)簽： bottleneck developed the concept
上傳時(shí)間： 2016-03-18
上傳用戶：極客
The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the door to increasing system speed and expansion capabilities. The PCI Local bus moves high speed peripherals from the I/O bus and places them closer to the system’s processor bus, providing faster data transfers between the processor and peripherals. The PCI Local bus also addresses the industry’s need for a bus standard which is not directly dependent on the speed, size and type of system processor. It represents the first microprocessor independent bus offering performance more than adequate for the most demanding applications such as full-motion video. User Manual
標(biāo)簽： bottleneck developed the concept
上傳時(shí)間： 2014-01-15
上傳用戶：努力努力再努力
SMI 321BB的量產(chǎn)工具的使用說(shuō)明及操作說(shuō)明等等.歡迎閱讀
標(biāo)簽： SMI 321 BB 量產(chǎn)工具
上傳時(shí)間： 2016-03-19
上傳用戶：我們的船長(zhǎng)
定標(biāo)線的設(shè)置與斷面數(shù)據(jù)的采集量直接關(guān)系到三維重建圖像的失真度。預(yù)置定標(biāo)線是斷面標(biāo)本進(jìn)行三維重建的依。定標(biāo)線決定了重建過(guò)程中片間各結(jié)構(gòu)的位置關(guān)系。而斷面數(shù)據(jù)的采集量決定了重建結(jié)構(gòu)的精細(xì)度,特別是細(xì)小結(jié)構(gòu)。
標(biāo)簽： 數(shù)據(jù) 三維重建 采集 圖像
上傳時(shí)間： 2016-03-19
上傳用戶：edisonfather
測(cè)試分析報(bào)告I/O設(shè)備管理 測(cè)試分析報(bào)告
標(biāo)簽： 測(cè)試 分 報(bào)告 設(shè)備管理
上傳時(shí)間： 2016-03-21
上傳用戶：aa17807091
摘要: 研究了蒙特卡羅仿真原理和仿真結(jié)果置信度 結(jié)合AWGN(加性白高斯噪聲) 信道特點(diǎn),甄選出3 個(gè)合適的 參量,即誤碼個(gè)數(shù)、置信概率和仿真結(jié)果最大相對(duì)誤差 提出了AWGN 信道下仿真數(shù)據(jù)量選取的一般性結(jié)論,即誤 碼個(gè)數(shù)正比于置信區(qū)間上分位點(diǎn)的平方、反比于最大相對(duì)誤差的平方. 仿真結(jié)果驗(yàn)證了所提結(jié)論在AWGN 信道各 種信噪比下均有效 同時(shí)對(duì)于無(wú)線通信或移動(dòng)通信的時(shí)變多徑衰落信道,如采用OFDM(正交頻分復(fù)用) 、分集、均 衡、交織等技術(shù),能將信道改造為AWGN 信道,該結(jié)論依然有效. 關(guān) 鍵 詞: 加性白高斯噪聲 蒙特卡羅仿真 仿真數(shù)據(jù)量 置信概率
上傳時(shí)間： 2016-03-22
上傳用戶：cylnpy
著重研究了水位、布量、水量和轉(zhuǎn)速脈沖檢測(cè)原理,給出了詳細(xì)的水位檢測(cè)、 重量檢測(cè)電路。實(shí)踐表明,系統(tǒng)硬件運(yùn)行穩(wěn)定,在進(jìn)行模糊推理及神經(jīng)網(wǎng)絡(luò)學(xué)習(xí)時(shí)具有更快的速度
標(biāo)簽： 水位 檢測(cè)原理 實(shí)踐 檢測(cè)電路
上傳時(shí)間： 2014-01-27
上傳用戶：alan-ee
中穎示例程序,控制ROHM MP3芯片,調(diào)試OK已量產(chǎn)
上傳時(shí)間： 2013-12-16
上傳用戶：zaizaibang
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